Computing power scheduling method and apparatus
US-2026064467-A1 · Mar 5, 2026 · US
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Wang Enbo patents
Wang Enbo is listed as an inventor on 44 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Wang Enbo |
| Total patents | 44 |
| First publication | Jan 1, 2015 |
| Latest publication | Mar 5, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
3D NAND memory device and method of forming the same
US-12446217-B2 · Oct 14, 2025 · US
Communication method and communication apparatus
US-2024349086-A1 · Oct 17, 2024 · US
Clock frequency determining method and apparatus
US-2024137199-A1 · Apr 25, 2024 · US
Communication method using artificial intelligence and communication apparatus
US-2024106722-A1 · Mar 28, 2024 · US
Computing node management method and system
US-2024086236-A1 · Mar 14, 2024 · US
Data processing method and apparatus
US-11894995-B2 · Feb 6, 2024 · US
Method of fabrication thereof a multi-level vertical memory device including inter-level channel connector
US-11805643-B2 · Oct 31, 2023 · US
Novel 3d nand memory device and method of forming the same
US-2023337423-A1 · Oct 19, 2023 · US
3D NAND memory device and method of forming the same
US-11737263-B2 · Aug 22, 2023 · US
Recent patents
Latest publications not already listed above.
Method for forming contact structures in three-dimensional memory devices
US-11716843-B2 · Aug 1, 2023 · US
Multi-level vertical memory device including inter-level channel connector
US-11502094-B2 · Nov 15, 2022 · US
Data Processing Method And Apparatus
US-2022231929-A1 · Jul 21, 2022 · US
Semiconductor device and method of fabrication thereof
US-2021398999-A1 · Dec 23, 2021 · US
Novel 3d nand memory device and method of forming the same
US-2021391347-A1 · Dec 16, 2021 · US
3D NAND memory device and method of forming the same
US-11145667-B2 · Oct 12, 2021 · US
Method for forming contact structures in three-dimensional memory devices
US-2021296346-A1 · Sep 23, 2021 · US
Through array contact (TAC) for three-dimensional memory devices
US-10937806-B2 · Mar 2, 2021 · US
Inter-deck plug in three-dimensional memory device and method for forming the same
US-10892280-B2 · Jan 12, 2021 · US
Inter-deck plug in three-dimensional memory device and method for forming the same
US-2020335515-A1 · Oct 22, 2020 · US
Through array contact (tac) for three-dimensional memory devices
US-2020266211-A1 · Aug 20, 2020 · US
Inter-deck plug in three-dimensional memory device and method for forming the same
US-10741578-B2 · Aug 11, 2020 · US
Semiconductor plug protected by protective dielectric layer in three-dimensional memory device and method for forming the same
US-10714493-B2 · Jul 14, 2020 · US
Methods of semiconductor device fabrication
US-2020185270-A1 · Jun 11, 2020 · US
Three-dimensional memory device having semiconductor plug formed using backside substrate thinning
US-10679985-B2 · Jun 9, 2020 · US
Methods of semiconductor device fabrication
US-10665500-B1 · May 26, 2020 · US
Through array contact (TAC) for three-dimensional memory devices
US-10658378-B2 · May 19, 2020 · US
Memory device and forming method thereof
US-10651193-B2 · May 12, 2020 · US
Three-dimensional memory device having semiconductor plug formed using backside substrate thinning
US-2020126974-A1 · Apr 23, 2020 · US
Inter-deck plug in three-dimensional memory device and method for forming the same
US-2020111807-A1 · Apr 9, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Yangtze Memory Tech Co Ltd | 28 |
| Huawei Tech Co Ltd | 16 |
Top CPC classifications
Most common classification codes across this inventor's patents.