LSTM circuit with selective input computation
US-12361269-B2 · Jul 15, 2025 · US
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Knag Phil patents
Knag Phil is listed as an inventor on 76 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Knag Phil |
| Total patents | 76 |
| First publication | Dec 8, 2016 |
| Latest publication | Jul 15, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Resilient i/o interconnect
US-2025209027-A1 · Jun 26, 2025 · US
System for implementing a sparse coding algorithm
US-2025200376-A1 · Jun 19, 2025 · US
Lstm circuit with selective input computation
US-2023401434-A1 · Dec 14, 2023 · US
Compute near memory with backend memory
US-11812599-B2 · Nov 7, 2023 · US
Compute near memory convolution accelerator
US-2023334006-A1 · Oct 19, 2023 · US
LSTM circuit with selective input computation
US-11790217-B2 · Oct 17, 2023 · US
Memoryless weight storage hardware for neural networks
US-11783160-B2 · Oct 10, 2023 · US
Processor array for processing sparse binary neural networks
US-2023297819-A1 · Sep 21, 2023 · US
FinFET transistor based resistive random access memory
US-11751404-B2 · Sep 5, 2023 · US
Recent patents
Latest publications not already listed above.
Applications of back-end-of-line (BEOL) capacitors in compute-in-memory (CIM) circuits
US-11727260-B2 · Aug 15, 2023 · US
Compute near memory convolution accelerator
US-11726950-B2 · Aug 15, 2023 · US
Multi-chip module having a stacked logic chip and memory stack
US-11699681-B2 · Jul 11, 2023 · US
Processor array for processing sparse binary neural networks
US-11663452-B2 · May 30, 2023 · US
Reconfigurable memory compression techniques for deep neural networks
US-11625584-B2 · Apr 11, 2023 · US
Deep in memory architecture using resistive switches
US-11522012-B2 · Dec 6, 2022 · US
In-memory analog neural cache
US-11502696-B2 · Nov 15, 2022 · US
Low synch dedicated accelerator with in-memory computation capability
US-11416165-B2 · Aug 16, 2022 · US
Compute in/near memory (CIM) circuit architecture for unified matrix-matrix and matrix-vector computations
US-11347477-B2 · May 31, 2022 · US
Weight prefetch for in-memory neural network execution
US-11347994-B2 · May 31, 2022 · US
Compute near memory with backend memory
US-2022165735-A1 · May 26, 2022 · US
Programmable neuron core with on-chip learning and stochastic time step control
US-11281963-B2 · Mar 22, 2022 · US
Compute near memory with backend memory
US-11251186-B2 · Feb 15, 2022 · US
Applications of back-end-of-line (beol) capacitors in compute-in-memory (cim) circuits
US-2022012581-A1 · Jan 13, 2022 · US
Reconfigurable neuro-synaptic cores for spiking neural network
US-11195079-B2 · Dec 7, 2021 · US
Programmable interface to in-memory cache processor
US-11151046-B2 · Oct 19, 2021 · US
Applications of back-end-of-line (BEOL) capacitors in compute-in-memory (CIM) circuits
US-11138499-B2 · Oct 5, 2021 · US
Scalable free-running neuromorphic computer
US-11100385-B2 · Aug 24, 2021 · US
Compute in memory circuits with multi-Vdd arrays and/or analog multipliers
US-11061646-B2 · Jul 13, 2021 · US
Neuromorphic computer with reconfigurable memory mapping for various neural network topologies
US-11062203-B2 · Jul 13, 2021 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 72 |
| Univ Michigan Regents | 4 |
| Sumbul Huseyin Ekin | 1 |
| Chen Gregory K | 1 |
| Kumar Raghavan | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06N3/063 | 48 |
| G06F7/5443 | 22 |
| G06N3/04 | 21 |
| G11C7/1006 | 21 |
| G11C11/419 | 21 |