Translation support for a virtual cache
US-12141076-B2 · Nov 12, 2024 · US
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Helms Markus patents
Helms Markus is listed as an inventor on 54 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Helms Markus |
| Total patents | 54 |
| First publication | Apr 28, 2016 |
| Latest publication | Nov 12, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Translation support for a virtual cache
US-2023401161-A1 · Dec 14, 2023 · US
Translation support for a virtual cache
US-11775445-B2 · Oct 3, 2023 · US
Memory preserving parse tree based compression with entropy coding
US-11308277-B2 · Apr 19, 2022 · US
Memory preserving parse tree based compression with entropy coding
US-11263398-B2 · Mar 1, 2022 · US
Suspending translation look-aside buffer purge execution in a multi-processor environment
US-11036647-B2 · Jun 15, 2021 · US
Multi-engine address translation facility
US-10956341-B2 · Mar 23, 2021 · US
Zone-SDID mapping scheme for TLB purges
US-10929312-B2 · Feb 23, 2021 · US
Translation support for a virtual cache
US-2021026783-A1 · Jan 28, 2021 · US
Translation support for a virtual cache
US-10831674-B2 · Nov 10, 2020 · US
Recent patents
Latest publications not already listed above.
Sharing virtual and real translations in a virtual cache
US-10810134-B2 · Oct 20, 2020 · US
Suspending translation look-aside buffer purge execution in a multi-processor environment
US-10698835-B2 · Jun 30, 2020 · US
Translation support for a virtual cache
US-10698836-B2 · Jun 30, 2020 · US
Multi-engine address translation facility
US-2020159670-A1 · May 21, 2020 · US
Multi-engine address translation facility
US-10635603-B2 · Apr 28, 2020 · US
Multi-engine address translation facility
US-10621105-B2 · Apr 14, 2020 · US
Sharing virtual and real translations in a virtual cache
US-10606762-B2 · Mar 31, 2020 · US
Memory preserving parse tree based compression with entropy coding
US-2020089754-A1 · Mar 19, 2020 · US
Memory preserving parse tree based compression with entropy coding
US-10521506-B2 · Dec 31, 2019 · US
Suspending translation look-aside buffer purge execution in a multi-processor environment
US-2019286573-A1 · Sep 19, 2019 · US
Zone-sdid mapping scheme for tlb purges
US-2019258588-A1 · Aug 22, 2019 · US
Incorporating purge history into least-recently-used states of a translation lookaside buffer
US-10387326-B2 · Aug 20, 2019 · US
Multi-engine address translation facility
US-10380032-B2 · Aug 13, 2019 · US
Multi-engine address translation facility
US-10380033-B2 · Aug 13, 2019 · US
Memory preserving parse tree based compression with entropy coding
US-2019243894-A1 · Aug 8, 2019 · US
Multi-engine address translation facility
US-2019236025-A1 · Aug 1, 2019 · US
Multi-engine address translation facility
US-2019236024-A1 · Aug 1, 2019 · US
Zone-SDID mapping scheme for TLB purges
US-10353828-B2 · Jul 16, 2019 · US
Suspending translation look-aside buffer purge execution in a multi-processor environment
US-10353825-B2 · Jul 16, 2019 · US
Zone-SDID mapping scheme for TLB purges
US-10353827-B2 · Jul 16, 2019 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 54 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F12/1009 | 32 |
| G06F12/1027 | 22 |
| G06F2212/683 | 18 |
| G06F2212/681 | 16 |
| G06F2212/65 | 16 |