Zone-SDID mapping scheme for TLB purges

US10929312B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10929312-B2
Application numberUS-201916404779-A
CountryUS
Kind codeB2
Filing dateMay 7, 2019
Priority dateJun 7, 2017
Publication dateFeb 23, 2021
Grant dateFeb 23, 2021

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  1. Title

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Abstract

Official abstract text for this publication.

Embodiments include techniques for using a zone-SDID mapping for translation lookaside buffer (TLB) purges, the techniques include receiving a zone purge request, including zone attribute information, and searching for matching zone attribute information in a zone register using the zone purge request. The techniques also include computing, based at least in part on the search, a state descriptor identifier (SDID) vector for each matching zone of the zone register, and reading TLB entries referenced in the zone purge request. The techniques include comparing an SDID of the TLB entry against an SDID specified in the SDID vector, and purging the TLB entries based on the comparison.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method for using a zone-SDID mapping for translation lookaside buffer (TLB) purges, the computer-implemented method comprising: receiving zone attribute information; matching zone attribute information in a zone register; computing a state descriptor identifier (SDID) vector for each matching zone of the zone register; comparing an SDID of the TLB entry associated with the zone attribute information against an SDID specified in the SDID vector; and purging the TLB entry based on the comparison. 2. The computer-implemented method of claim 1 , wherein zone attribute information includes at least one of thread or guest attribute information. 3. The computer-implemented method of claim 1 , further comprising receiving a zone purge request including at least one of an additional purge qualifier. 4. The computer-implemented method of claim 1 , further comprising excluding a TLB entry from storing zone information in a combined region and segment-table entry portion of the TLB. 5. The computer-implemented method of claim 1 , wherein the zone register is implemented as separate content addressable memories. 6. The computer-implemented method of claim 1 , wherein the comparison is based on matching SDIDs and at least one of an additional purge criterion. 7. The computer-implemented method of claim 1 , wherein the SDID identifies at least one of a logical processing unit or virtual processor. 8. A system for using a zone-SDID mapping for translation lookaside buffer (TLB) purges, the system comprising: a translation lookaside buffer; a storage medium, the storage medium being coupled to a processor; the processor configured to: receive zone attribute information; search for matching zone attribute information in a zone register using the zone purge request; compute a state descriptor identifier (SDID) vector for each matching zone of the zone register; compare an SDID of the TLB entry associated with the zone attribute information against an SDID specified in the SDID vector; and purge the TLB entry based on the comparison. 9. The system of claim 8 , wherein the zone attribute information includes at least one of thread or guest attribute information. 10. The system of claim 8 , wherein the processor is further configured to receive a zone purge request that includes at least one of an additional purge. 11. The system of claim 8 , wherein the processor is further configured to exclude a TLB entry from storing zone information in a combined region and segment-table entry portion of the TLB. 12. The system of claim 8 , wherein the zone register is implemented as separate content addressable memories. 13. The system of claim 8 , wherein the comparison is based on matching SDIDs and at least one of an additional purge criterion. 14. The system of claim 8 , wherein the SDID identifies at least one of a logical processing unit or virtual processor. 15. A computer program product for using a zone-SDID mapping for translation lookaside buffer (TLB) purges, the computer program product comprising: a computer readable storage medium having stored thereon first program instructions executable by a processor to cause the processor to: receive zone attribute information; matching zone attribute information in a zone register; compute, based at least in part on the search, a state descriptor identifier (SDID) vector for each matching zone of the zone register; compare an SDID of the TLB entry associated with the zone attribute information against an SDID specified in the SDID vector; and purge the TLB entry based on the comparison. 16. The computer program product of claim 15 , wherein the zone attribute information includes at least one of thread or guest attribute information. 17. The computer program product of claim 15 , wherein the processor is further configured to receive a zone purge request including at least one of an additional purge qualifier. 18. The computer program product of claim 15 , wherein the processor is configured to exclude a TLB entry from storing zone information in a combined region and segment-table entry portion of the TLB. 19. The computer program product of claim 15 , wherein the comparison is based on matching SDIDs and at least one of an additional purge criterion. 20. The computer program product of claim 15 , wherein the SDID identifies at least one of a logical processing unit or virtual processor.

Assignees

Inventors

Classifications

  • Invalidation · CPC title

  • using pseudo-associative means, e.g. set-associative or hashing · CPC title

  • for a range · CPC title

  • Cleaning, compaction, garbage collection, erase control · CPC title

  • using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] · CPC title

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What does patent US10929312B2 cover?
Embodiments include techniques for using a zone-SDID mapping for translation lookaside buffer (TLB) purges, the techniques include receiving a zone purge request, including zone attribute information, and searching for matching zone attribute information in a zone register using the zone purge request. The techniques also include computing, based at least in part on the search, a state descript…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F12/121. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Feb 23 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).