Chip resistor and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9520215-B2
Application number	US-201213718415-A
Country	US
Kind code	B2
Filing date	Dec 18, 2012
Priority date	Jul 27, 2009
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

A method of manufacturing a chip resistor includes the following steps. A resistor layer is formed on an obverse surface of a material substrate. A plurality of substrate sections are defined in the material substrate by forming, in the obverse surface of the material substrate, a plurality of first grooves each of which is elongated in a first direction. A conductor layer is formed in each of the first grooves. The substrate sections are cut along lines extending in a second direction different from the first direction.

First claim

The invention claimed is:

1. A method of manufacturing a chip resistor, the method comprising the steps of:
forming a surface electrode layer on an obverse surface of a material substrate;
forming a resistor layer on the obverse surface of the material substrate;
defining a plurality of substrate sections in the material substrate by forming, in the obverse surface of the material substrate, a plurality of first grooves each being elongated in a first direction and having a bottom surface, a part of the surface electrode layer being removed while each of the first grooves is being formed;
forming a conductor layer in each of the first grooves;
cutting the bottom surface of each of the first grooves with a dicing blade; and
cutting the substrate sections in a second direction different from the first direction,
wherein each of the first grooves has a first side surface and a second side surface that are spaced apart from each other in the second direction,
in each of the first grooves, the conductor layer includes a first layer portion and a second layer portion that are disposed on the first side surface and the second side surface, respectively,
the conductor layer further includes a bottom layer portion formed on the bottom surface, and the first layer portion and the second layer portion are spaced apart from each other via a vacant space in the second direction, and
in each of the first grooves, the dicing blade cuts the bottom layer portion.

2. The method according to claim 1 , wherein the dicing blade is smaller in width than said each of the first grooves.

3. The method according to claim 1 , wherein the resistor layer comprises a plurality of resistor rows spaced from each other in the second direction, each of the resistor rows comprising a plurality of resistor strips arranged in the first direction, each of the resistor strips being elongated in the second direction,
wherein in the step of defining a plurality of substrate sections, each of the first grooves is formed between adjacent two of the resistor rows.

4. The method according to claim 3 , wherein the surface electrode layer comprises a plurality of surface electrode rows spaced from each other in the second direction, each of the surface electrode rows comprising a plurality of surface electrode portions arranged in the first direction, and
wherein in the step of forming a resistor layer, each of the resistor strips is formed in a manner overlapping two of the surface electrode portions that are adjacent to each other in the second direction.

5. The method according to claim 3 , wherein the conductor layer comprises a plurality of conductive portions each of which is electrically connected to one of the resistor strips.

6. The method according to claim 1 , wherein the step of forming a conductor layer comprises printing a conductive material.

7. The method according to claim 1 , wherein the step of forming a conductor layer comprising sputtering of a conductive material.

8. The method according to claim 7 , further comprising the step of forming, before forming the conductor layer, a masking layer that covers the resistor layer and is provided with openings for exposing the first grooves.

9. The method according to claim 1 , wherein each of the first layer portion and the second layer portion has a thickness measured in the second direction, and said thickness is smaller than a distance between the first layer portion and the second layer portion in the second direction.

10. The method according to claim 9 , wherein the conductor layer includes the bottom layer portion disposed on the bottom surface of each of the first grooves, and the bottom layer portion has a thickness smaller than a depth of said each of the first grooves.

11. The method according to claim 10 , wherein in each of the first grooves, the bottom layer portion connects the first layer portion and the second layer portion to each other.

12. The method according to claim 10 , further comprising the step of forming, in the bottom surface of each of the first grooves, a second groove smaller in width than said each of the first grooves.

13. The method according to claim 12 , wherein the width of the second groove is smaller than the distance between the first layer portion and the second layer portion in the second direction.

14. The method according to claim 12 , wherein the forming of the second groove is performed using a dicing blade.

15. The method according to claim 14 , wherein in the step of forming the second groove, a part of the bottom layer portion is removed by the dicing blade.

16. The method according to claim 15 , wherein the bottom layer portion includes a central part, a first marginal part and a second marginal part, the central part being flanked by the first marginal part and the second marginal part in the second direction, and only the central part among the three parts is removed by the dicing blade.

17. The method according to claim 16 , wherein after the second groove is formed, the first marginal part protrudes from the first layer portion in the second direction, and the second marginal part protrudes from the second layer portion in the second direction.

18. The method according to claim 17 , wherein the first layer portion is in direct contact with the first side surface, and the second layer portion is in direct contact with the second side surface.

19. The method according to claim 1 , further comprising the step of forming, before forming the conductor layer, a masking layer that covers the resistor layer and is provided with openings for exposing the first grooves, wherein in each of the first grooves, at least a part of each of the first side surface and the second side surface is covered with the masking layer.

Assignees

• Rohm Co Ltd

Inventors

• Yoneda Masaki

Classifications

• Y10T29/49101

  Applying terminal · CPC title

• H01C17/28

  adapted for applying terminals · CPC title

• H01C7/003

  Thick film resistors · CPC title

• H01C17/006 Primary

  adapted for manufacturing resistor chips · CPC title

• H01C17/281

  by thick film techniques · CPC title