Process for fabricating wiring board

Patent metadata

Field	Value
Publication number	US-9084379-B2
Application number	US-201213423578-A
Country	US
Kind code	B2
Filing date	Mar 19, 2012
Priority date	Sep 16, 2008
Publication date	Jul 14, 2015
Grant date	Jul 14, 2015

Abstract

A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

First claim

What is claimed is:

1. A process for fabricating a wiring board, comprising:
forming a first wiring carrying substrate including a first carry substrate and a first wiring layer disposed on the first carry substrate;
forming at least a first blind via in the first wiring carrying substrate, wherein the first blind via extends from the first wiring layer into the first carry substrate;
laminating the first wiring carrying substrate to a second wiring carrying substrate via an insulation layer, wherein the second wiring carrying substrate includes a second carry substrate and a second wiring layer disposed on the second carry substrate, the insulation layer is disposed between the first wiring layer and the second wiring layer, and full fills the first blind via;
removing a part of the first carry substrate and a part of the second carry substrate to expose the insulation layer in the first blind via;
removing a part of the insulation layer in the first blind via to form a hole extending from the first wiring layer to the second wiring layer;
forming a conductive pillar in the hole, wherein the conductive pillar is connected between the first wiring layer and the second wiring layer; and
removing the remained first carry substrate and the remained second carry substrate.

2. The process for fabricating a wiring board as claimed in claim 1 , wherein a method of forming the hole comprises thermally ablating a part of the insulation in the first blind via by using a laser beam.

3. The process for fabricating a wiring board as claimed in claim 2 , wherein the laser beam is provided by a carbon dioxide laser device, an ultra violet laser device or a yttrium aluminium garnet (YAG) laser device.

4. The process for fabricating a wiring board as claimed in claim 1 , wherein a method of forming the hole comprises performing a mechanical drilling process.

5. The process for fabricating a wiring board as claimed in claim 1 , wherein the second wiring carrying substrate has at least a second blind via extending from the second wiring layer to the second carry substrate, and when the first wiring carrying substrate is laminated on the second wiring carrying substrate via the insulation layer, the insulation layer further full fills the second blind via, and after a part of the second carry substrate is removed, the insulation layer in the second blind via is exposed.

6. The process for fabricating a wiring board as claimed in claim 5 , wherein the second blind via is opposite to the first blind via, and when a part of the insulation layer in the first blind via is removed, a part of the insulation layer in the second blind via is also removed for connecting the first blind via and the second blind via.

7. The process for fabricating a wiring board as claimed in claim 1 , wherein a method of forming the first wiring carrying substrate comprises:
forming a mask layer on the first carry substrate, wherein the mask layer partially covers a surface of the first carry substrate; and
forming the first wiring layer and a barrier layer, wherein the first wiring layer and the barrier layer are located on the surface of the first carry substrate partially exposed by the mask layer, the first wiring layer is located between the barrier layer and the first carry substrate, and the first wiring layer and the barrier layer wholly cover the surface of the first carry substrate.

8. The process for fabricating a wiring board as claimed in claim 7 , wherein a method of forming the first blind via comprises:
removing a part of the mask layer to form at least an opening partially exposing the first carry substrate; and
removing a part of the first carry substrate in the opening.

9. The process for fabricating a wiring board as claimed in claim 8 , wherein a method of removing a part of the mask layer comprises removing a part of the mask layer by using a laser beam.

10. The process for fabricating a wiring board as claimed in claim 8 , wherein a method of removing the first carry substrate comprises etching the first carry substrate.

11. The process for fabricating a wiring board as claimed in claim 8 , wherein after the first blind via is formed, the process further comprises removing the barrier layer and the remained mask layer.

12. The process for fabricating a wiring board as claimed in claim 1 , wherein a method of forming the blind via comprises thermally ablating a part of the first carry substrate by using a laser beam.

13. The process for fabricating a wiring board as claimed in claim 1 , wherein the insulation layer is a resin layer or prepreg.

Assignees

• Chen Tsung-Yuan
• Chen Chun-Chien
• Yu Cheng-Po
• Unimicron Technology Corp

Inventors

• Chen Tsung-Yuan
• Chen Chun-Chien
• Yu Cheng-Po

Classifications

• H05K2201/0969

  Apertured conductors · CPC title

• H05K3/0038

  combined with laser drilling through a metal layer · CPC title

• H05K3/0035

  of blind holes, i.e. having a metal layer at the bottom · CPC title

• H05K2203/0376

  Etching temporary metallic carrier substrate · CPC title

• H05K2203/108

  Using a plurality of lasers or laser light with a plurality of wavelengths · CPC title