Method and structure to incorporate multiple low loss photonic circuit components

US12498402B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12498402-B2
Application numberUS-202118247059-A
CountryUS
Kind codeB2
Filing dateSep 28, 2021
Priority dateSep 28, 2020
Publication dateDec 16, 2025
Grant dateDec 16, 2025

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A photonic integrated circuit including a substrate, a plurality of oxide layers on the substrate, and various passive and active integrated optical components in the plurality of oxide layers. The integrated optical components include silicon nitride waveguides, a Pockets effect phase shifter (e.g., BaTiO 3 phase shifter), a superconductive nanowire single photon detector (SNSPD), an optical isolation structure surrounding the SNSPD, a single photon generator, a thermal isolation structure, a heater, a temperature sensor, a photodiode for data communication (e.g., a Ge photodiode), or a combination thereof.

First claim

Opening claim text (preview).

What is claimed is: 1 . A photonic integrated circuit comprising: a substrate; a plurality of oxide layers on the substrate; silicon nitride (SiN) waveguides in the plurality of oxide layers and configured to transport photons; a Pockels effect optical phase shifter in the plurality of oxide layers and configured to change phase delays of photons transported by a first SiN waveguide of the SiN waveguides; a superconductive nanowire single photon detector (SNSPD) in the plurality of oxide layers and configured to detect photons transported by a second SiN waveguide of the SiN waveguides; an optical isolation structure in the plurality of oxide layers, the optical isolation structure surrounding the SNSPD and configured to block stray light; and an undercut region formed in the substrate, the undercut region below a region of the plurality of oxide layers and configured to thermally isolate the region of the plurality of oxide layers. 2 . The photonic integrated circuit of claim 1 , wherein the Pockels effect optical phase shifter includes a BaTiO 3 optical phase shifter of an optical switch. 3 . The photonic integrated circuit of claim 1 , wherein the optical isolation structure surrounding the SNSPD includes a portion of a silicide layer, a portion of a metal layer, a metal trench, or a combination thereof. 4 . The photonic integrated circuit of claim 1 , wherein the SiN waveguides are on two or more SiN layers that are characterized by different thicknesses. 5 . The photonic integrated circuit of claim 1 , further comprising a single photon generator in the plurality of oxide layers. 6 . The photonic integrated circuit of claim 1 , further comprising a silicon grating coupler in the plurality of oxide layers, the silicon grating coupler configured to couple light into or out of the SiN waveguides. 7 . The photonic integrated circuit of claim 1 , further comprising a silicon nitride grating coupler in the plurality of oxide layers, the silicon nitride grating coupler configured to couple light between two SiN waveguides of the SiN waveguides. 8 . The photonic integrated circuit of claim 1 , wherein the substrate includes a V-groove for aligning an optical fiber. 9 . The photonic integrated circuit of claim 1 , further comprising a silicon layer on a buried oxide layer of the plurality of oxide layers. 10 . The photonic integrated circuit of claim 1 , further comprising a temperature sensor in the plurality of oxide layers. 11 . The photonic integrated circuit of claim 1 , further comprising a silicide heating element in the plurality of oxide layers. 12 . The photonic integrated circuit of claim 1 , further comprising a Ge photodiode in the plurality of oxide layers, the Ge photodiode configured to detect optical communication signals. 13 . The photonic integrated circuit of claim 1 , further comprising an optical interposer between the substrate and the plurality of oxide layers, the optical interposer including at least two silicon nitride waveguide layers characterized by different thicknesses. 14 . A method comprising: fabricating a first wafer that includes: a first substrate; a first plurality of oxide layers on the first substrate; silicon nitride (SiN) waveguides in the first plurality of oxide layers; and a superconductive nanowire single photon detector (SNSPD) in the first plurality of oxide layers; fabricating a second wafer that includes: a second substrate; a second plurality of oxide layers on the second substrate; and a Pockels effect optical phase shifter in the second plurality of oxide layers; bonding the first plurality of oxide layers to the second plurality of oxide layers; removing the second substrate; forming electrical connectors in the second plurality of oxide layers and the first plurality of oxide layers; forming an undercut region in the first substrate; and forming, on the second plurality of oxide layers, a third plurality of oxide layers; and one or more metal layers in the third plurality of oxide layers, the one or more metal layers in electrical connection with the electrical connectors. 15 . A system on a semiconductor substrate, the system comprising: a plurality of heralded photon sources, each heralded photon source of the plurality of heralded photon sources including a first output and a second output; a plurality of delay lines, each delay line of the plurality of delay lines optically coupled to the first output of a respective heralded photon source of the plurality of heralded photon sources; a plurality of single photon detectors, each single photon detector of the plurality of single photon detectors optically coupled to the second output of a respective heralded photon source of the plurality heralded photon sources; and a switch network comprising: a first crossing network including a first set of input ports and a first set of output ports, each input port of the first set of input ports optically coupled to an output of a respective delay line of the plurality of delay lines; a second crossing network including a second set of input ports and at least one output port; and a plurality of phase shifters between the first crossing network and the second crossing network, each phase shifter of the plurality of phase shifters optically coupling an output port of the first set of output ports of the first crossing network to an input port of the second set of input ports of the second crossing network. 16 . The system of claim 15 , wherein the plurality of delay lines includes SiN waveguides with a loss lower than 0.5 dB/m. 17 . The system of claim 15 , wherein the plurality of phase shifters includes a plurality of Pockels effect phase shifters. 18 . The system of claim 15 , wherein each single photon detector of the plurality of single photon detectors includes a superconductive nanowire single photon detector. 19 . The system of claim 15 , wherein the first crossing network includes a plurality of Mach-Zehnder interferometers.

Assignees

Inventors

Classifications

  • Quantum wires or nanorods · CPC title

  • having multiple elements covered by H10F30/00 in a repetitive configuration, e.g. radiation detectors comprising photodiode arrays · CPC title

  • in an optical waveguide structure · CPC title

  • using electro-optic elements · CPC title

  • Single-photon detection or photon counting · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US12498402B2 cover?
A photonic integrated circuit including a substrate, a plurality of oxide layers on the substrate, and various passive and active integrated optical components in the plurality of oxide layers. The integrated optical components include silicon nitride waveguides, a Pockets effect phase shifter (e.g., BaTiO 3 phase shifter), a superconductive nanowire single photon detector (SNSPD), an optical …
Who is the assignee on this patent?
Psiquantum Corp
What technology area does this patent fall under?
Primary CPC classification G01R15/242. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 16 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).