Microelectronic assemblies having topside power delivery structures

US12374625B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12374625-B2
Application numberUS-202117355726-A
CountryUS
Kind codeB2
Filing dateJun 23, 2021
Priority dateJun 23, 2021
Publication dateJul 29, 2025
Grant dateJul 29, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate, having a surface, including a first conductive pathway electrically coupled to a power source; an insulating material on the surface of the package substrate; a first microelectronic component, having a first surface facing the package substrate and an opposing second surface, embedded in the insulating material; a second microelectronic component, having a first surface facing the package substrate and an opposing second surface, embedded in the insulating material; a redistribution layer on the insulating material including a second conductive pathway electrically coupled to the second surface of the second microelectronic component and the second surface of the first microelectronic component; and a wire bond electrically coupling the first and the second conductive pathways.

First claim

Opening claim text (preview).

The invention claimed is: 1. A microelectronic assembly, comprising: a circuit board including a power source; a package substrate, having a first surface and an opposing second surface, on the circuit board with the first surface facing the circuit board and including a first conductive pathway electrically coupled to the power source; a first microelectronic component, having a first surface and an opposing second surface, embedded in a mold material on the second surface of the package substrate; a through-mold via (TMV), positioned along a perimeter of the mold material, extending through the mold material and electrically coupled to the first conductive pathway; a redistribution layer (RDL), having a first surface and an opposing second surface, on the mold material with the first surface facing the mold material, including a second conductive pathway electrically coupled to the TMV; a second microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway, wherein the second conductive pathway electrically couples the TMV, the second microelectronic component, and the second surface of the first microelectronic component; and a third microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway, wherein the third microelectronic component is an inductor. 2. The microelectronic assembly of claim 1 , wherein the first microelectronic component is a central processing unit, a graphics processing unit, a digital signal processor, an application specific integrated circuit, a server processor, or a crypto processor. 3. The microelectronic assembly of claim 1 , wherein the second microelectronic component is a voltage regulator. 4. The microelectronic assembly of claim 1 , further comprising: a heat transfer structure at the second surface of the RDL. 5. The microelectronic assembly of claim 3 , wherein the voltage regulator is configured to convert a low current high voltage signal to a low voltage high current signal. 6. The microelectronic assembly of claim 1 , further comprising: a capacitive element at the first surface of the package substrate and electrically coupled to the first conductive pathway. 7. A microelectronic assembly, comprising: a circuit board including a power source; a package substrate, having a first surface and an opposing second surface, on the circuit board with the first surface facing the circuit board and including a first conductive pathway electrically coupled to the power source; a first microelectronic component, having a first surface and an opposing second surface, embedded in a mold material on the second surface of the package substrate; a through-mold via (TMV), positioned along a perimeter of the mold material, extending through the mold material and electrically coupled to the first conductive pathway; a redistribution layer (RDL), having a first surface and an opposing second surface, on the mold material with the first surface facing the mold material, including a second conductive pathway electrically coupled to the TMV; a second microelectronic component at the second surface of the RDL and electrically coupled to the second conductive pathway, wherein the second conductive pathway electrically couples the TMV, the second microelectronic component, and the second surface of the first microelectronic component, wherein the second microelectronic component has a first surface at the second surface of the RDL and an opposing second surface; and a third microelectronic component at the second surface of the second microelectronic component and electrically coupled to the second conductive pathway, wherein the third microelectronic component is an inductor.

Assignees

Inventors

Classifications

  • characterised by multiple insulating or insulated package substrates, interposers or RDLs · CPC title

  • Interconnections or connectors in packages · CPC title

  • Shapes or dispositions of interconnections · CPC title

  • Arrangements for heating · CPC title

  • Inductive arrangements or effects of, or between, wiring layers · CPC title

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What does patent US12374625B2 cover?
Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a package substrate, having a surface, including a first conductive pathway electrically coupled to a power source; an insulating material on the surface of the package substrate; a first microelectronic component, having a first surface facing the package s…
Who is the assignee on this patent?
Intel Corp
What technology area does this patent fall under?
Primary CPC classification H10W70/611. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 29 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).