Semiconductor component having through-silicon vias

Patent metadata

Field	Value
Publication number	US-11545392-B2
Application number	US-202017021600-A
Country	US
Kind code	B2
Filing date	Sep 15, 2020
Priority date	Apr 13, 2011
Publication date	Jan 3, 2023
Grant date	Jan 3, 2023

Abstract

A semiconductor component includes a substrate having an opening. The semiconductor component further includes a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T1 at a first end of the opening, and a thickness T2 at a second end of the opening, and R1 is a ratio of T1 to T2. The semiconductor component further includes a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T3 at the first end of the opening, a thickness T4 at the second end of the opening, R2 is a ratio of T3 to T4, and R1 is greater than R2.

First claim

What is claimed:

1. A semiconductor component comprising:
a substrate having an opening;
a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T 1 at a first end of the opening, and a thickness T 2 at a second end of the opening, and R 1 is a ratio of T 1 to T 2 , and
a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T 3 at the first end of the opening, a thickness T 4 at the second end of the opening, R 2 is a ratio of T 3 to T 4 , and R 1 is greater than R 2 .

2. The semiconductor component of claim 1 , wherein the opening extends through an entirety of the substrate.

3. The semiconductor component of claim 1 , further comprising a conductive material surrounded by the second dielectric liner.

4. The semiconductor component of claim 1 , wherein the ratio R 1 ranges from about 5 to about 20.

5. The semiconductor component of claim 1 , wherein the ratio R 2 ranges from about 1 to about 5.

6. The semiconductor component of claim 1 , wherein the second dielectric liner comprises an oxide layer.

7. The semiconductor component of claim 1 , wherein the first dielectric liner has an etching rate of about 1 angstrom/minute (A/min) to about 10 A/min in a HF solution.

8. A semiconductor component comprising:
a substrate having an opening;
a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T 1 at a first end of the opening, and a thickness T 2 at a second end of the opening, and R 1 is a ratio of T 1 to T 2 , and
a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T 3 at the first end of the opening, a thickness T 4 at the second end of the opening, R 2 is a ratio of T 3 to T 4 , and R 1 is different from R 2 .

9. The semiconductor component of claim 8 , wherein the ratio R 1 ranges from about 1 to about 5.

10. The semiconductor component of claim 8 , wherein the ratio R 2 ranges from about 5 to about 20.

11. The semiconductor component of claim 8 , further comprising a third dielectric liner in the opening, wherein the third dielectric liner having a thickness T 5 at the first end of the opening, and a thickness T 6 at the second end of the opening, and R 3 is a ratio of T 5 to T 6 .

12. The semiconductor component of claim 11 , wherein R 3 is greater than R 1 .

13. The semiconductor component of claim 11 , wherein R 3 is equal to R 2 .

14. The semiconductor component of claim 11 , wherein the third dielectric liner is between the substrate and the first dielectric liner.

15. The semiconductor component of claim 11 , wherein the first dielectric liner is between the second dielectric liner and the third dielectric liner.

16. The semiconductor component of claim 8 , further comprising a conductive material surrounded by the second dielectric liner.

17. A semiconductor component comprising:
a substrate having an opening;
a first dielectric liner in the opening, wherein the first dielectric liner having a thickness T 1 at a first end of the opening, and a thickness T 2 at a second end of the opening, and R 1 is a ratio of T 1 to T 2 , and
a second dielectric liner over the first dielectric liner, wherein the second dielectric liner having a thickness T 3 at the first end of the opening, a thickness T 4 at the second end of the opening, R 2 is a ratio of T 3 to T 4 , R 1 is greater than R 2 , and the second dielectric liner is entirely within the opening.

18. The semiconductor component of claim 17 , wherein the ratio R 1 ranges from about 5 to about 20.

19. The semiconductor component of claim 17 , further comprising a third dielectric liner between the first dielectric liner and the second dielectric liner.

20. The semiconductor component of claim 17 , further comprising a conductive material surrounded by the second dielectric liner.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Yu Chen-Hua
• Chang Cheng-Hung
• Liao Ebin
• Yu Chia-Lin
• Wang Hsiang-Yi
• Chang Chun Hua
• Huang Li-Hsien
• Kuo Darryl
• Wu Tsang-Jiuh
• Chiou Wen-Chih

Classifications

• H10W20/0265

  characterised by the sidewall insulation · CPC title

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10P95/062

  involving a dielectric removal step · CPC title

• H10P52/403

  of conductive or resistive materials · CPC title

• H10P52/402

  of semiconductor materials · CPC title