Semiconductor component having through-silicon vias and method of manufacture

Patent metadata

Field	Value
Publication number	US-10115634-B2
Application number	US-201615214776-A
Country	US
Kind code	B2
Filing date	Jul 20, 2016
Priority date	Apr 13, 2011
Publication date	Oct 30, 2018
Grant date	Oct 30, 2018

Abstract

A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner.

First claim

What is claimed:

1. A semiconductor component comprising:
a semiconductor substrate having an opening;
a first dielectric liner having a first stress over an interior surface of the opening;
a second dielectric liner having a second stress over the first dielectric liner, wherein a direction of the first stress is opposite a direction of the second stress; and
a conductive material over the second dielectric liner.

2. The semiconductor component of claim 1 , wherein the first dielectric liner has a first thickness adjacent to a top surface of the substrate and a second thickness adjacent to a bottom surface of the substrate, and the first thickness is different from the second thickness.

3. The semiconductor component of claim 2 , wherein the first thickness ranges from about 200 Angstroms (Å) to about 2000 Å, and the second thickness ranges from about 20 Å to about 200 Å.

4. The semiconductor component of claim 1 , wherein the second dielectric liner has a first thickness adjacent to a top surface of the substrate and a second thickness adjacent to a bottom surface of the substrate, and the first thickness is different from the second thickness.

5. The semiconductor component of claim 4 , wherein the first thickness ranges from about 500 Å to about 2500 Å, and the second thickness ranges from about 500 Å to about 2500 Å.

6. The semiconductor component of claim 1 , further comprising a third dielectric liner between the second dielectric liner and the conductive material, the third dielectric liner having a third stress in a same direction as the first stress, wherein the third dielectric liner has a first thickness adjacent to a top surface of the substrate and a second thickness adjacent to a bottom surface of the substrate, and the first thickness is different from the second thickness.

7. The semiconductor component of claim 6 , wherein the first thickness ranges from about 500 Å to about 2500 Å, and the second thickness ranges from about 500 Å to about 2500 Å.

8. A semiconductor component comprising:
a semiconductor substrate having an opening;
a first dielectric liner over an interior surface of the opening, the first dielectric liner having a first etching rate in an HF solution, wherein the first dielectric liner has a first thickness adjacent to a top surface of the substrate and a second thickness adjacent to a bottom surface of the substrate, and the first thickness is different from the second thickness;
a second dielectric liner over the first dielectric liner, the second dielectric liner having a second etching rate in the HF solution, wherein the first etching rate is different from the second etching rate; and
a conductive material over the second dielectric liner, wherein at least one surface of the conductive material is level with at least one surface of the semiconductor substrate.

9. The semiconductor component of claim 8 , wherein a ratio of the first thickness to the second thickness ranges from about 5 to about 20.

10. The semiconductor component of claim 8 , wherein the second dielectric liner has a third thickness adjacent to a top surface of the substrate and a fourth thickness adjacent to a bottom surface of the substrate, wherein a ratio of the third thickness to the fourth thickness ranges from about 1 to about 5.

11. The semiconductor component of claim 8 , further comprising a third dielectric liner between the second dielectric liner and the conductive material.

12. The semiconductor component of claim 11 , wherein the third dielectric liner has a third thickness adjacent to a top surface of the substrate and a fourth thickness adjacent to a bottom surface of the substrate, and the third thickness is different from the fourth thickness.

13. A semiconductor component comprising:
a semiconductor substrate having an opening;
a first dielectric liner over an interior surface of the opening, wherein the first dielectric liner has a first etching rate in an HF solution, and the first dielectric liner has a first stress in a first direction;
a second dielectric liner over the first dielectric liner, wherein the second dielectric liner has a second etching rate in the HF solution different from the first etching rate, and the second dielectric liner has a second stress in a second direction opposite the first direction; and
a conductive material over the second dielectric liner.

14. The semiconductor component of claim 13 , wherein the conductive material extends from a top-most surface of the semiconductor substrate to a bottom-most surface of the semiconductor substrate.

15. The semiconductor component of claim 13 , further comprising a barrier layer between the conductive material and the second dielectric liner.

16. The semiconductor component of claim 13 , wherein a thickness of the first dielectric liner adjacent a first surface of the semiconductor substrate is different from a thickness of the first dielectric liner adjacent a second surface of the semiconductor substrate, and the second surface is opposite the first surface.

17. The semiconductor component of claim 13 , wherein a thickness of the second dielectric liner adjacent a first surface of the semiconductor substrate is different from a thickness of the second dielectric liner adjacent a second surface of the semiconductor substrate, and the second surface is opposite the first surface.

18. The semiconductor component of claim 13 , wherein a thickness of the second dielectric liner adjacent a first surface of the semiconductor substrate is substantially equal to a thickness of the second dielectric liner adjacent a second surface of the semiconductor substrate, and the second surface is opposite the first surface.

19. The semiconductor component of claim 13 , a first end face of the first dielectric liner is exposed at a top-most surface of the semiconductor substrate a second end face of the first dielectric liner is exposed at a bottom-most surface of the semiconductor substrate.

20. The semiconductor component of claim 12 , wherein a ratio of the third thickness to the fourth thickness ranges from about 5 to about 20.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Yu Chen-Hua
• Chang Cheng-Hung
• Liao Ebin
• Yu Chia-Lin
• Wang Hsiang-Yi
• Chang Chun Hua
• Huang Li-Hsien
• Kuo Darryl
• Wu Tsang-Jiuh
• Chiou Wen-Chih

Classifications

• H10W20/0265

  characterised by the sidewall insulation · CPC title

• H10W20/0245

  comprising use of blind vias during the manufacture · CPC title

• H10P95/062

  involving a dielectric removal step · CPC title

• H10P52/403

  of conductive or resistive materials · CPC title

• H10P52/402

  of semiconductor materials · CPC title