Accommodating device for retaining wafers

US11355374B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11355374-B2
Application numberUS-202017106402-A
CountryUS
Kind codeB2
Filing dateNov 30, 2020
Priority dateDec 20, 2010
Publication dateJun 7, 2022
Grant dateJun 7, 2022

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A receiving means for receiving and mounting of wafers, comprised of a mounting surface, mounting means for mounting a wafer onto the mounting surface and compensation means for active, locally controllable, compensation of local and/or global distortions of the wafer.

First claim

Opening claim text (preview).

Having described the invention, the following is claimed: 1. An apparatus for aligning a first wafer with a second wafer, having the following features: a device configured to detect local alignment errors that have occurred to strain and/or distortion of the first wafer relative to the second wafer using at least one of a first strain map and/or a first position map of the first wafer and a second strain map and/or a second position map of the second wafer; at least one receiving device configured to receive and hold at least one of the first wafer and the second wafer on a holding surface thereof via holding means, the at least one receiving device comprising temperature-controllable compensation means for at least partial active compensation of local and/or global distortions of the held at least one of the first wafer and the second wafer; and alignment means for aligning the first wafer with the second wafer, the alignment means being configured to supplement the at least partial compensation of the temperature-controllable compensation means based on the at least one of the first strain map and/or the first position map of the first wafer and the second strain map and/or the second position map of the second wafer, wherein the device configured to determine local alignment errors is further configured to verify whether the aligning is successful. 2. A method for aligning a first wafer with a second wafer, comprising: detecting, via a detecting device, local alignment errors that have occurred due to strain and/or distortion of the first wafer relative to the second wafer using at least one of a first strain map and/or a first position map of the first wafer and a second strain map and/or a second position map of the second wafer; receiving, on at least one receiving device, at least one of the first wafer and the second wafer; holding, on a holding surface of the at least one receiving device via holding means thereof, the at least one of the first wafer and the second wafer; at least partially compensating, via temperature-controllable compensation means of the at least one receiving device, local and/or global distortions of the held at least one of the first wafer and the second wafer; aligning, via alignment means, the first wafer with the second wafer, the aligning comprising supplementing the at least partial compensating based on the at least one of the first strain map and/or the first position map of the first wafer and the second strain map and/or the second position map of the second wafer; and verifying, via the detecting device, whether the aligning is successful.

Assignees

Inventors

Classifications

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Apparatus for mechanical treatment or grinding or cutting · CPC title

  • Monitoring of warpages, curvatures, damages, defects or the like · CPC title

  • for supporting or gripping · CPC title

  • H10P72/50Primary

    for positioning, orientation or alignment · CPC title

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Frequently asked questions

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What does patent US11355374B2 cover?
A receiving means for receiving and mounting of wafers, comprised of a mounting surface, mounting means for mounting a wafer onto the mounting surface and compensation means for active, locally controllable, compensation of local and/or global distortions of the wafer.
Who is the assignee on this patent?
Ev Group E Thallner Gmbh
What technology area does this patent fall under?
Primary CPC classification H10P72/0616. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 07 2022 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).