Semiconductor package having interconnectable substrates
US-2026026374-A1 · Jan 22, 2026 · US
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Yan Junrong patents
Yan Junrong is listed as an inventor on 21 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Yan Junrong |
| Total patents | 21 |
| First publication | Oct 22, 2020 |
| Latest publication | Jan 22, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Dicing and wafer thinning to form semiconductor dies
US-12506036-B2 · Dec 23, 2025 · US
Semiconductor wafer thinned by horizontal stealth lasing
US-12506015-B2 · Dec 23, 2025 · US
Semiconductor device with reduced stress die pick and place
US-12463097-B2 · Nov 4, 2025 · US
Mold compound dispensing system and method
US-12083715-B2 · Sep 10, 2024 · US
Wire bonding for semiconductor devices
US-11901327-B2 · Feb 13, 2024 · US
Vertical semiconductor device with side grooves
US-11894343-B2 · Feb 6, 2024 · US
Semiconductor wafer thinned by horizontal stealth lasing
US-2023411169-A1 · Dec 21, 2023 · US
Semiconductor Wafer Dicing Method
US-2023402323-A1 · Dec 14, 2023 · US
Sloped interconnector for stacked die package
US-11756932-B2 · Sep 12, 2023 · US
Recent patents
Latest publications not already listed above.
Semiconductor device including vertical wire bonds
US-11749647-B2 · Sep 5, 2023 · US
Mold Compound Dispensing System and Method
US-2023173720-A1 · Jun 8, 2023 · US
Vertical semiconductor device with side grooves
US-2022375899-A1 · Nov 24, 2022 · US
Semiconductor device with reduced stress die pick and place
US-2022181208-A1 · Jun 9, 2022 · US
Aperture structure on semiconductor component backside to alleviate delamination in stacked packaging
US-11289395-B2 · Mar 29, 2022 · US
Wire Bonding For Semiconductor Devices
US-2022052014-A1 · Feb 17, 2022 · US
Sloped interconnector for stacked die package
US-2021407967-A1 · Dec 30, 2021 · US
Semiconductor device including vertical wire bonds
US-2021366875-A1 · Nov 25, 2021 · US
Semiconductor device with top die positioned to reduce die cracking
US-11177241-B2 · Nov 16, 2021 · US
Semiconductor device with top die positioned to reduce die cracking
US-2020381401-A1 · Dec 3, 2020 · US
Aperture structure on semiconductor component backside to alleviate delamination in stacked packaging
US-2020335481-A1 · Oct 22, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Western Digital Tech Inc | 18 |
| Sandisk Technologies Inc | 4 |
| Sandisk Technologies Llc | 1 |
| Morgan Lewis & Bockius Llp | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W90/00 | 13 |
| H01L25/0657 | 11 |
| H10W90/752 | 10 |
| H10W90/754 | 10 |
| H10W90/24 | 8 |