Register interface for computer processor
US-12437095-B2 · Oct 7, 2025 · US
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Varma Ankush patents
Varma Ankush is listed as an inventor on 126 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Varma Ankush |
| Total patents | 126 |
| First publication | Apr 21, 2015 |
| Latest publication | Oct 7, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Configuration of base clock frequency of processor based on usage parameters
US-12416940-B2 · Sep 16, 2025 · US
Context aware frequency prioritization
US-2025208920-A1 · Jun 26, 2025 · US
Device, method and system for determining a frequency ratio of a processor with inference engine circuitry
US-2025199931-A1 · Jun 19, 2025 · US
Current control for a multicore processor
US-12314114-B2 · May 27, 2025 · US
Performance level control in a data processing apparatus
US-12298833-B2 · May 13, 2025 · US
Hardware-assisted core frequency and voltage scaling in a poll mode idle loop
US-12282377-B2 · Apr 22, 2025 · US
Hierarchical power management apparatus and method
US-2025076954-A1 · Mar 6, 2025 · US
Device, system, and method for providing isolation between cores to facilitate a multi-tenant environment
US-2025004536-A1 · Jan 2, 2025 · US
Apparatus and method to detect power supply security attack and risk mitigation
US-12124314-B2 · Oct 22, 2024 · US
Recent patents
Latest publications not already listed above.
Real-time power meter for optimizing processor power management
US-12124350-B2 · Oct 22, 2024 · US
Hierarchical power management apparatus and method
US-12093100-B2 · Sep 17, 2024 · US
Configuration of base clock frequency of processor based on usage parameters
US-12066853-B2 · Aug 20, 2024 · US
System, apparatus and method for configurable control of asymmetric multi-threading (SMT) on a per core basis
US-11953962-B2 · Apr 9, 2024 · US
Multiple dies hardware processors and methods
US-11899615-B2 · Feb 13, 2024 · US
Apparatus and method for dynamic control of microprocessor configuration
US-11886918-B2 · Jan 30, 2024 · US
System, apparatus and method for globally aware reactive local power control in a processor
US-2024028101-A1 · Jan 25, 2024 · US
System, apparatus and method for globally aware reactive local power control in a processor
US-11853144-B2 · Dec 26, 2023 · US
Current control for a multicore processor
US-2023359263-A1 · Nov 9, 2023 · US
Configuration of base clock frequency of processor based on usage parameters
US-2023315143-A1 · Oct 5, 2023 · US
Current control for a multicore processor
US-11762449-B2 · Sep 19, 2023 · US
Performance level control in a data processing apparatus
US-2023236651-A1 · Jul 27, 2023 · US
Configuration of base clock frequency of processor based on usage parameters
US-11703906-B2 · Jul 18, 2023 · US
Register interface for computer processor
US-2023195918-A1 · Jun 22, 2023 · US
Multiple dies hardware processors and methods
US-2023169032-A1 · Jun 1, 2023 · US
System, apparatus and method for globally aware reactive local power control in a processor
US-2023148150-A1 · May 11, 2023 · US
System, Apparatus And Method For Configurable Control Of Asymmetric Multi-Threading (SMT) On A Per Core Basis
US-2023131521-A1 · Apr 27, 2023 · US
Multiple dies hardware processors and methods
US-11586579-B2 · Feb 21, 2023 · US
System, apparatus and method for configurable control of asymmetric multi-threading (SMT) on a per core basis
US-11579944-B2 · Feb 14, 2023 · US
Dynamically updating logical identifiers of cores of a processor
US-11567896-B2 · Jan 31, 2023 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Intel Corp | 126 |
| Varma Ankush | 10 |
| Sistla Krishnakanth V | 7 |
| Rowland Martin T | 6 |
| Garg Vivek | 5 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| Y02D10/00 | 107 |
| G06F1/324 | 76 |
| G06F1/3296 | 54 |
| G06F1/3206 | 50 |
| G06F1/3203 | 45 |