PCIe retimer with reduced power low latency mode
US-12461887-B1 · Nov 4, 2025 · US
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Sun Junqing patents
Sun Junqing is listed as an inventor on 44 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Sun Junqing |
| Total patents | 44 |
| First publication | Jan 26, 2016 |
| Latest publication | Nov 4, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Adaptive comparator calibration
US-2025286545-A1 · Sep 11, 2025 · US
Dual path clock forwarding
US-2025274259-A1 · Aug 28, 2025 · US
Dynamic timing loop gain to compensate phase interpolation nonlinearities
US-12401488-B1 · Aug 26, 2025 · US
Receivers and method with fast sampling phase and frequency acquisition
US-12261928-B2 · Mar 25, 2025 · US
Receivers and method with fast sampling phase and frequency acquisition
US-2025038944-A1 · Jan 30, 2025 · US
Fast efficient decoder for low distance rs and bch codes
US-2024388312-A1 · Nov 21, 2024 · US
Onboard/co-packaged optics with transmit-side equalization
US-11616576-B2 · Mar 28, 2023 · US
Retimer training during link speed negotiation and link training
US-11424968-B1 · Aug 23, 2022 · US
Equalizer training during link speed negotiation
US-11356302-B1 · Jun 7, 2022 · US
Recent patents
Latest publications not already listed above.
Equalizer training during link speed negotiation
US-2022173941-A1 · Jun 2, 2022 · US
Digital filtering using combined approximate summation of partial products
US-11347476-B2 · May 31, 2022 · US
Parallel channel skew for enhanced error correction
US-11309995-B2 · Apr 19, 2022 · US
Digital filtering using combined approximate summation of partial products
US-2022113939-A1 · Apr 14, 2022 · US
Systems and methods for testing jitter tolerance
US-11300613-B2 · Apr 12, 2022 · US
Systems and methods for testing jitter tolerance
US-2022082618-A1 · Mar 17, 2022 · US
Clock recovery using between-interval timing error estimation
US-11231740-B2 · Jan 25, 2022 · US
Digital equalizer with overlappable filter taps
US-11171815-B2 · Nov 9, 2021 · US
Digital equalizer with overlappable filter taps
US-2021226824-A1 · Jul 22, 2021 · US
On-chip jitter evaluation for SerDes
US-11038602-B1 · Jun 15, 2021 · US
Serdes pre-equalizer having adaptable preset coefficient registers
US-11032111-B2 · Jun 8, 2021 · US
Efficient multi-mode DFE
US-11005567-B2 · May 11, 2021 · US
Eye monitor for parallelized digital equalizers
US-10992501-B1 · Apr 27, 2021 · US
Parallel channel skew for enhanced error correction
US-2021013998-A1 · Jan 14, 2021 · US
Efficient multi-mode dfe
US-2021006335-A1 · Jan 7, 2021 · US
Clock Recovery Using Between-Interval Timing Error Estimation
US-2020249714-A1 · Aug 6, 2020 · US
Parallel mixed-signal equalization for high-speed serial link
US-10728059-B1 · Jul 28, 2020 · US
Serdes pre-equalizer having adaptable preset coefficient registers
US-2020076651-A1 · Mar 5, 2020 · US
Precompensator-based quantization for clock recovery
US-10447509-B1 · Oct 15, 2019 · US
Controlling false packet acceptance
US-10256944-B1 · Apr 9, 2019 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Credo Tech Group Ltd | 32 |
| Marvell Int Ltd | 10 |
| Credo Tech Group Ltd | 2 |
| Marvell Interntational Ltd | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L25/03057 | 15 |
| H04L25/03006 | 9 |
| H04L25/03885 | 9 |
| H04L25/4917 | 7 |
| H04L25/03146 | 6 |