Efficient multi-mode DFE

US11005567B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11005567-B2
Application numberUS-201916459491-A
CountryUS
Kind codeB2
Filing dateJul 1, 2019
Priority dateJul 1, 2019
Publication dateMay 11, 2021
Grant dateMay 11, 2021

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Abstract

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An illustrative SerDes receiver includes: a front-end filter, a precomputation unit, a selection element, and a controller. The front end filter converts a receive signal into a linearly-equalized signal. The precomputation unit accepts the linearly-equalized signal with or without a subtracted feedback signal, and employs a set of comparators with threshold values that depend on a first post-cursor ISI value F 1 , the set of comparators operating to generate a set of tentative symbol decisions. The selection element derives a selected symbol decision from each set of tentative symbol decisions, thereby deriving a sequence of symbol decisions from the receive signal. The controller constrains F 1 if the receive signal uses a PAM4 signal constellation, setting F 1 to equal zero if the receive signal is conveyed via a low-loss channel and to equal one if the receive signal is conveyed via a high-loss channel.

First claim

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What is claimed is: 1. A method for providing equalization, the method comprising: supplying a front end filter configured to convert a receive signal into a linearly-equalized signal; coupling the linearly-equalized signal to a set of comparators in a precomputation unit, the set of comparators using threshold values that depend on a first post-cursor inter-symbol interference (ISI) value F 1 , the set of comparators operable to generate a set of tentative symbol decisions; providing a selection element to derive a selected symbol decision from each set of tentative symbol decisions, thereby deriving a sequence of symbol decisions from the receive signal; and configuring a controller to leave the first post-cursor 151 value F 1 unconstrained to integers if the receive signal doesn't use a PAM4 signal constellation, and otherwise to constrain the first post-cursor ISI value F 1 if the receive signal uses a PAM4 signal constellation, the controller constraining the first post-cursor ISI value F 1 to equal zero if the receive signal is conveyed via a low-loss channel and to equal one if the receive signal is conveyed via a high-loss channel. 2. The method of claim 1 , wherein the set of comparators does not exceed eight comparators, and wherein the precomputation unit provides multi-tap precomputation if the receive signal uses non-return to zero (NRZ) signaling. 3. A method for providing equalization, the method comprising: supplying a front end filter configured to convert a receive signal into a linearly-equalized signal; coupling the linearly-equalized signal to a set of comparators in a precomputation unit, the set of comparators using threshold values that depend on a first post-cursor inter-symbol interference (ISI) value F 1 , the set of comparators operable to generate a set of tentative symbol decisions; providing a selection element to derive a selected symbol decision from each set of tentative symbol decisions, thereby deriving a sequence of symbol decisions from the receive signal; and configuring a controller to constrain the first post-cursor ISI value F 1 if the receive signal uses a PAM4 signal constellation, the controller constraining the first post-cursor ISI value F 1 to equal zero if the receive signal is conveyed via a low-loss channel and to equal one if the receive signal is conveyed via a high-loss channel, and further configuring the controller to determine whether the channel is a high-loss channel, wherein said determining includes: adapting the threshold values using NRZ training data; and determining that the channel is a high-loss channel if the threshold values correspond to a first post-cursor ISI value F 1 in excess of a predetermined threshold. 4. A method for providing equalization, the method comprising: supplying a front end filter configured to convert a receive signal into a linearly-equalized signal; coupling the linearly-equalized signal to a set of comparators in a precomputation unit, the set of comparators using threshold values that depend on a first post-cursor inter-symbol interference (ISI) value F 1 , the set of comparators operable to generate a set of tentative symbol decisions; providing a selection element to derive a selected symbol decision from each set of tentative symbol decisions, thereby deriving a sequence of symbol decisions from the receive signal; and configuring a controller to constrain the first post-cursor ISI value F 1 if the receive signal uses a PAM4 signal constellation, the controller constraining the first post-cursor ISI value F 1 to equal zero if the receive signal is conveyed via a low-loss channel and to equal one if the receive signal is conveyed via a high-loss channel, and further configuring the controller to disable one or more of said comparators when constraining the first post-cursor ISI value F 1 to equal zero; the selection element deriving the selected symbol decision from only enabled comparators in the precomputation unit. 5. The method of claim 1 , wherein said coupling the linearly-equalized signal to the set of comparators includes subtracting a feedback signal from the linearly-equalized signal. 6. The method of claim 5 , wherein the feedback signal is produced by a feedback filter, and wherein the controller is configured to disable the feedback filter if the receive signal uses a PAM4 signal constellation. 7. The method of claim 6 , wherein the controller is configured to adjust a cursor position for training the front end filter when constraining the first post-cursor ISI value F 1 . 8. The method of claim 1 , wherein the controller adjusts the thresholds to account for channel nonlinearities if the receive signal uses a PAM4 signal constellation and the receive signal is conveyed via a low-loss optical channel. 9. A SerDes receiver that comprises: a front end filter configured to convert a receive signal into a linearly-equalized signal; a precomputation unit coupled to accept the linearly-equalized signal with or without a subtracted feedback signal, the precomputation unit having a set of comparators using threshold values that depend on a first post-cursor inter-symbol interference (ISI) value F 1 , the set of comparators operable to generate a set of tentative symbol decisions; a selection element configured to derive a selected symbol decision from each set of tentative symbol decisions, thereby deriving a sequence of symbol decisions from the receive signal; and a controller configured to leave the first post-cursor ISI value F 1 unconstrained to integers if the receive signal doesn't use a PAM4 signal constellation, and otherwise configured to constrain the first post-cursor ISI value F 1 if the receive signal uses a PAM4 signal constellation, the controller constraining the first post-cursor ISI value F 1 to equal zero if the receive signal is conveyed via a low-loss channel and to equal one if the receive signal is conveyed via a high-loss channel. 10. The receiver of claim 9 , wherein the set of comparators does not exceed eight comparators, and wherein the precomputation unit provides multi-tap precomputation if the receive signal uses non-return to zero (NRZ) signaling. 11. A SerDes receiver that comprises: a front end filter configured to convert a receive signal into a linearly-equalized signal; a precomputation unit coupled to accept the linearly-equalized signal with or without a subtracted feedback signal, the precomputation unit having a set of comparators using threshold values that depend on a first post-cursor inter-symbol interference (ISI) value F 1 , the set of comparators operable to generate a set of tentative symbol decisions; a selection element configured to derive a selected symbol decision from each set of tentative symbol decisions, thereby deriving a sequence of symbol decisions from the receive signal; and a controller configured to constrain the first post-cursor ISI value F 1 if the receive signal uses a PAM4 signal constellation, the controller constraining the first post-cursor ISI value F 1 to equal zero if the receive signal is conveyed via a low-loss channel and to equal one if the receive signal is conveyed via a high-loss channel, wherein the controller is configured to: adapt the threshold values using NRZ training data; and determine that the channel is a high-loss channel if the threshold values correspond to a first post-cursor ISI value F 1 in excess of 0.6. 12. A SerDes receiver that comprises: a front end filter configured to convert a receive signal into a linearly-equalized signal; a precomputation unit coupled to accept the linearly-equalized signal with or without a subtracted feedback signa

Assignees

Inventors

Classifications

  • Time-delay networks {(analogue shift registers G11C27/04)} · CPC title

  • using equalisation · CPC title

  • Compensation for non-linear transmitter output · CPC title

  • Shaping networks in transmitter or receiver, e.g. adaptive shaping networks · CPC title

  • H04B10/541Primary

    Digital intensity or amplitude modulation · CPC title

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What does patent US11005567B2 cover?
An illustrative SerDes receiver includes: a front-end filter, a precomputation unit, a selection element, and a controller. The front end filter converts a receive signal into a linearly-equalized signal. The precomputation unit accepts the linearly-equalized signal with or without a subtracted feedback signal, and employs a set of comparators with threshold values that depend on a first post-c…
Who is the assignee on this patent?
Credo Tech Group Ltd
What technology area does this patent fall under?
Primary CPC classification H04B10/541. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 11 2021 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 10 related publications on this page (citations in our corpus or others sharing the same primary CPC).