Semiconductor device and method of making a wafer-level chip-scale package
US-11961764-B2 · Apr 16, 2024 · US
Strothmann Thomas J is listed as an inventor on 13 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Strothmann Thomas J |
| Total patents | 13 |
| First publication | Aug 27, 2015 |
| Latest publication | Apr 16, 2024 |
Publications ranked by popularity score, then publication date.
US-11961764-B2 · Apr 16, 2024 · US
US-2021233815-A1 · Jul 29, 2021 · US
US-11011423-B2 · May 18, 2021 · US
US-2020006177-A1 · Jan 2, 2020 · US
US-10446459-B2 · Oct 15, 2019 · US
US-2019109048-A1 · Apr 11, 2019 · US
US-10181423-B2 · Jan 15, 2019 · US
US-2017278765-A1 · Sep 28, 2017 · US
US-9704769-B2 · Jul 11, 2017 · US
US-2017133270-A1 · May 11, 2017 · US
Latest publications not already listed above.
US-9620413-B2 · Apr 11, 2017 · US
US-9553162-B2 · Jan 24, 2017 · US
US-2015243575-A1 · Aug 27, 2015 · US
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Stats Chippac Pte Ltd | 12 |
| Stats Chippac Ltd | 4 |
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W74/019 | 13 |
| H10W72/9413 | 13 |
| H10W72/0198 | 13 |
| H10W74/014 | 12 |
| H10W72/241 | 12 |