Semiconductor device and method of forming semiconductor die with active region responsive to external stimulus

Patent metadata

Field	Value
Publication number	US-9553162-B2
Application number	US-201313853969-A
Country	US
Kind code	B2
Filing date	Mar 29, 2013
Priority date	Sep 15, 2011
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

A semiconductor device has a semiconductor die and an encapsulant deposited over the semiconductor die. A conductive layer can be formed over the encapsulant and the semiconductor die. A transmissive layer can be formed over the semiconductor die. An interconnect structure can be formed through the encapsulant and electrically connected to the conductive layer, whereby the interconnect structure is formed off to only one side of the semiconductor die.

First claim

What is claimed:

1. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
depositing a first encapsulant over and completely surrounding the first semiconductor die;
forming a first transmissive layer over an active surface of the first semiconductor die including an opening formed through the first transmissive layer;
disposing a second semiconductor die in the opening of the first transmissive layer with the second semiconductor die coupled to the first semiconductor die by direct chip to chip assembly; and
depositing a second encapsulant between the first semiconductor die and second semiconductor die and between the second semiconductor die and transmissive layer, wherein a top surface of the second encapsulant is coplanar with a top surface of the first transmissive layer.

2. The method of claim 1 , further including forming a second transmissive layer over the second semiconductor die and second encapsulant.

3. The method of claim 2 , wherein the second semiconductor die is a sensor responsive to an external stimulus passing through the second transmissive layer.

4. The method of claim 2 , wherein the second transmissive layer includes an optical dielectric material or an optical transparent or translucent material.

5. A semiconductor device, comprising:
a first semiconductor die including a light-sensitive sensor formed in an active region of the first semiconductor die;
a first encapsulant deposited over and extending completely around side surfaces of the first semiconductor die;
a first conductive layer formed directly on the first encapsulant and the first semiconductor die;
a first optically transmissive layer formed on the first semiconductor die over the active region and first conductive layer including an opening completely through the first optically transmissive layer;
a second semiconductor die disposed in the opening of the first optically transmissive layer and connected to the first semiconductor die by direct chip to chip assembly using a plurality of first conductive bumps;
a second encapsulant deposited within the opening of the first optically transmissive layer between the second semiconductor die and first optically transmissive layer and contacting the first semiconductor die and side surfaces of the second semiconductor die and first optically transmissive layer;
a second conductive bump formed completely through the first encapsulant directly over the first conductive layer and completely outside a footprint of the first semiconductor die; and
a substrate including the first semiconductor die mounted to the substrate with a second conductive layer of the substrate directly metallurgically connected to the second conductive bump and with the second conductive bump including a portion of solder extending uninterrupted between the first conductive layer and second conductive layer.

6. The semiconductor device of claim 5 , wherein the external stimulus passing through the second transmissive layer further includes a tactile response.

7. The semiconductor device of claim 5 , further including a second transmissive layer formed over the second semiconductor die, wherein the second semiconductor die further includes an active region responsive to an external stimulus passing through the second transmissive layer.

8. The semiconductor device of claim 5 , wherein the active region of the second semiconductor die includes a sensor.

9. A semiconductor device, comprising:
a first semiconductor die;
a first encapsulant deposited over and completely surrounding the first semiconductor die;
a first transmissive layer formed over an active surface of the first semiconductor die including an opening formed through the first transmissive layer;
a second semiconductor die disposed in the opening of the first transmissive layer and coupled to the first semiconductor die by direct chip to chip assembly; and
a second encapsulant deposited between the first semiconductor die and second semiconductor die and between the second semiconductor die and transmissive layer, wherein a top surface of the second encapsulant is coplanar with a top surface of the first transmissive layer.

10. The semiconductor device of claim 9 , wherein an active region of the first semiconductor die is responsive to an external stimulus passing through the first transmissive layer.

11. The semiconductor device of claim 9 , wherein the second semiconductor die is a sensor responsive to an external stimulus.

12. The semiconductor device of claim 9 , further including a second transmissive layer formed over the second semiconductor die.

13. The semiconductor device of claim 9 , further including an interconnect structure formed through the first encapsulant.

Assignees

• Stats Chippac Ltd
• Stats Chippac Pte Ltd

Inventors

• Strothmann Thomas J
• Anderson Steve
• Han Byung Joon
• Shim Il Kwon
• Kuan Heap Hoe

Classifications

• H10W90/722

  between stacked chips · CPC title

• H10W74/117

  the substrate having spherical bumps for external connection · CPC title

• H10W74/019

  using temporary auxiliary substrates (H10W74/017 takes precedence) · CPC title

• H10W74/01

  Manufacture or treatment · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title