Semiconductor Device and Method of Using a Standardized Carrier in Semiconductor Packaging

Patent metadata

Field	Value
Publication number	US-2019109048-A1
Application number	US-201816204737-A
Country	US
Kind code	A1
Filing date	Nov 29, 2018
Priority date	Oct 2, 2012
Publication date	Apr 11, 2019
Grant date	—

Abstract

A semiconductor device has a carrier with a fixed size. A plurality of first semiconductor die is singulated from a first semiconductor wafer. The first semiconductor die are disposed over the carrier. The number of first semiconductor die on the carrier is independent from the size and number of first semiconductor die singulated from the first semiconductor wafer. An encapsulant is deposited over and around the first semiconductor die and carrier to form a reconstituted panel. An interconnect structure is formed over the reconstituted panel while leaving the encapsulant devoid of the interconnect structure. The reconstituted panel is singulated through the encapsulant. The first semiconductor die are removed from the carrier. A second semiconductor die with a size different from the size of the first semiconductor die is disposed over the carrier. The fixed size of the carrier is independent of a size of the second semiconductor die.

First claim

What is claimed:

1 . A method of making a semiconductor device, comprising:
providing a plurality of first semiconductor die; providing a carrier, wherein a size of the carrier is independent of a size of the first semiconductor die; and disposing the first semiconductor die over the carrier, wherein the first semiconductor die are spaced 50 micrometers (μm) apart from each other or less.

2 . The method of claim 1 , further including depositing an encapsulant over the first semiconductor die and carrier to form a reconstituted panel.

3 . The method of claim 2 , further including backgrinding the reconstituted panel to remove a portion of the encapsulant and expose the first semiconductor die.

4 . The method of claim 3 , further including depositing an insulating layer over the reconstituted panel after backgrinding the reconstituted panel.

5 . The method of claim 2 , further including singulating the reconstituted panel through the encapsulant.

6 . The method of claim 5 , wherein singulating the reconstituted panel fully removes the encapsulant between two adjacent first semiconductor die.

7 . A method of making a semiconductor device, comprising:
singulating a plurality of first semiconductor die from a first semiconductor wafer; singulating a plurality of second semiconductor die from a second semiconductor wafer, wherein a size of the second semiconductor die is substantially equal to a size of the first semiconductor die; and disposing the first semiconductor die and second semiconductor die over a carrier.

8 . The method of claim 7 , further including depositing an encapsulant over the carrier, first semiconductor die, and second semiconductor die.

9 . The method of claim 8 , further including cutting through the encapsulant, wherein a thickness of encapsulant left on side surfaces of the first semiconductor die and second semiconductor die after cutting is 50 micrometers (μm) or less.

10 . The method of claim 7 , wherein the plurality of first semiconductor die constitute a total number of semiconductor die singulated from the first semiconductor wafer.

11 . The method of claim 7 , further including arranging the first semiconductor die and second semiconductor die over the carrier, wherein the first semiconductor die and second semiconductor die are spaced 50 micrometers (μm) apart from each other or less.

12 . The method of claim 7 , further including forming a fan-in interconnect structure over each of the first semiconductor die and each of the second semiconductor die after disposing the first semiconductor die and second semiconductor die over the carrier.

13 . The method of claim 12 , further including forming a plurality of conductive bumps over the fan-in interconnect structures.

14 . A method of making a semiconductor device, comprising:
providing a carrier; disposing a first semiconductor die on the carrier; depositing an encapsulant over the first semiconductor die; forming a fan-in interconnect structure over the first semiconductor die after depositing the encapsulant; and cutting through the encapsulant after forming the fan-in interconnect structure.

15 . The method of claim 14 , wherein cutting through the encapsulant leaves 50 micrometers (μm) of encapsulant or less over a side surface of the first semiconductor die.

16 . The method of claim 14 , wherein cutting through the encapsulant removes a portion of the first semiconductor die.

17 . The method of claim 14 , further including disposing a second semiconductor die on the carrier, wherein the first semiconductor die and second semiconductor die are spaced 50 micrometers (μm) apart from each other or less.

18 . The method of claim 17 , further including:
singulating the first semiconductor die from a first semiconductor wafer; and singulating the second semiconductor die from a second semiconductor wafer.

19 . The method of claim 17 , further including:
depositing the encapsulant over the second semiconductor die; and forming a second fan-in interconnect structure over the second semiconductor die after depositing the encapsulant.

20 . A method of making a semiconductor device, comprising:
providing a carrier; disposing a semiconductor die on the carrier; depositing an encapsulant over the semiconductor die; and cutting through the encapsulant around the semiconductor die, wherein a thickness of the encapsulant over a side surface of the semiconductor die after cutting is 100 micrometers (μm) or less.

21 . The method of claim 20 , further including forming a fan-in interconnect structure over the semiconductor die.

22 . The method of claim 20 , wherein cutting through the encapsulant completely removes the encapsulant over the side surface of the semiconductor die.

23 . The method of claim 20 , further including forming a conductive bump over the semiconductor die after depositing the encapsulant.

24 . The method of claim 20 , further including backgrinding the encapsulant to expose a back surface of the semiconductor die.

25 . The method of claim 24 , further including forming an insulating layer over the back surface of the semiconductor die after backgrinding.

Assignees

• Stats Chippac Pte Ltd

Inventors

• Strothmann Thomas J
• Pricolo Damien M
• Shim Il Kwon
• Lin Yaojian
• Wirtz Heinz-Peter
• Yoon Seung Wook
• Marimuthu Pandi C

Classifications

• H10P72/7416

  used during dicing or grinding · CPC title

• H10P72/7402

  Wafer tapes, e.g. grinding or dicing support tapes · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title