Semiconductor device and method of forming encapsulated wafer level chip scale package (EWLCSP)

Patent metadata

Field	Value
Publication number	US-9704769-B2
Application number	US-201514627347-A
Country	US
Kind code	B2
Filing date	Feb 20, 2015
Priority date	Feb 27, 2014
Publication date	Jul 11, 2017
Grant date	Jul 11, 2017

Abstract

A semiconductor device has a semiconductor die and an encapsulant around the semiconductor die. A fan-in interconnect structure is formed over the semiconductor die while leaving the encapsulant devoid of the interconnect structure. The fan-in interconnect structure includes an insulating layer and a conductive layer formed over the semiconductor die. The conductive layer remains within a footprint of the semiconductor die. A portion of encapsulant is removed from over the semiconductor die. A backside protection layer is formed over a non-active surface of the semiconductor die after depositing the encapsulant. The backside protection layer is formed by screen printing or lamination. The backside protection layer includes an opaque, transparent, or translucent material. The backside protection layer is marked for alignment using a laser. A reconstituted panel including the semiconductor die is singulated through the encapsulant to leave encapsulant disposed over a sidewall of the semiconductor die.

First claim

What is claimed:

1. A method of making a semiconductor device, comprising:
providing a plurality of semiconductor die;
depositing an encapsulant around and over the semiconductor die;
forming a first insulating layer over an active surface of the semiconductor die and in contact with the encapsulant;
forming an interconnect structure over the first insulating layer and semiconductor die by,
(a) forming a conductive layer, and
(b) forming a bump over the conductive layer, wherein the entire interconnect structure is disposed within a footprint of the semiconductor die as a fan-in interconnect structure;

forming a protection layer over a top surface of the encapsulant and over a second surface of the semiconductor die opposite the active surface; and
singulating the plurality of semiconductor die through the protective layer, encapsulant, and first insulating layer to leave a thickness of the encapsulant disposed over a side surface of the semiconductor die less than 100 micrometers and the first insulating layer and protection layer terminating at an outside surface of the encapsulant.

2. The method of claim 1 , further including removing a portion of the encapsulant to leave the top surface of the encapsulant coplanar with the second surface of the semiconductor die.

3. The method of claim 1 , further including forming a second insulating layer over the conductive layer, wherein the second insulating layer terminates at the outside surface of the encapsulant.

4. The method of claim 1 , wherein the protective material includes a transparent material or translucent material.

5. The method of claim 1 , wherein the protective material includes an opaque material.

6. The method of claim 1 , wherein the thickness of the encapsulant disposed over the side surface of the semiconductor die ranges from 30 to 50 micrometers.

7. A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing an encapsulant around and over the semiconductor die;
forming a first insulating layer over the encapsulant and a first surface of the semiconductor die;
forming an interconnect structure over the first insulating layer and semiconductor die by,
(a) forming a conductive layer, and
(b) forming a bump over the conductive layer, wherein the entire interconnect structure is disposed within a footprint of the semiconductor die; and

forming a protection layer over a top surface of the encapsulant and over a second surface of the semiconductor die opposite the first surface of the semiconductor die, wherein a thickness of the encapsulant disposed over a side surface of the semiconductor die is less than 100 micrometers and the first insulating layer and protection layer terminate at an outside surface of the encapsulant.

8. The method of claim 7 , further including removing a portion of the encapsulant to leave the top surface of the encapsulant coplanar with the second surface of the semiconductor die.

9. The method of claim 7 , further including forming a second insulating layer over the conductive layer, wherein the second insulating layer terminates at the outside surface of the encapsulant.

10. The method of claim 7 , wherein the protective material includes a transparent material or translucent material.

11. The method of claim 7 , wherein the protective material includes an opaque material.

12. The method of claim 7 , wherein the thickness of the encapsulant disposed over the side surface of the semiconductor die ranges from 30 to 50 micrometers.

13. A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing an encapsulant around and over the semiconductor die;
forming a first insulating layer over the encapsulant and a first surface of the semiconductor die;
forming an interconnect structure over the first insulating layer and semiconductor die by,
(a) forming a conductive layer, and
(b) forming a bump over the conductive layer, wherein the interconnect structure is disposed within a footprint of the semiconductor die; and

forming a protection layer over a surface of the encapsulant and over a second surface of the semiconductor die opposite the first surface of the semiconductor die, wherein a thickness of the encapsulant disposed over a side surface of the semiconductor die is less than 100 micrometers.

14. The method of claim 13 , further including removing a portion of the encapsulant to leave the surface of the encapsulant coplanar with the second surface of the semiconductor die.

15. The method of claim 13 , wherein the first insulating layer and protection layer terminate at an outside surface of the encapsulant.

16. The method of claim 13 , further including forming a second insulating layer over the conductive layer, wherein the second insulating layer terminates at an outside surface of the encapsulant.

17. The method of claim 13 , wherein the protective material includes a transparent material or translucent material.

18. The method of claim 13 , wherein the protective material includes an opaque material.

19. The method of claim 13 , wherein the thickness of the encapsulant disposed over the side surface of the semiconductor die ranges from 30 to 50 micrometers.

20. A method of making a semiconductor device, comprising:
providing a semiconductor die;
depositing an encapsulant around and over the semiconductor die;
forming a first insulating layer over the encapsulant and a first surface of the semiconductor die; and
forming an interconnect structure over the first insulating layer and semiconductor die by,
(a) forming a conductive layer, and
(b) forming a bump over the conductive layer, wherein the interconnect structure is disposed within a footprint of the semiconductor die;

wherein a thickness of the encapsulant disposed over a side surface of the semiconductor die is less than 100 micrometers.

21. The method of claim 20 , wherein the first insulating layer terminates at an outside surface of the encapsulant.

22. The method of claim 20 , wherein a thickness of the encapsulant over the semiconductor die is at least 100 micrometers.

23. The method of claim 20 , wherein the thickness of the encapsulant disposed over the side surface of the semiconductor die ranges from 30 to 50 micrometers.

Assignees

• Stats Chippac Ltd
• Stats Chippac Pte Ltd

Inventors

• Strothmann Thomas J
• Yoon Seung Wook
• Lin Yaojian

Classifications

• H10W74/142

  the encapsulations exposing the passive side of the semiconductor body · CPC title

• H10W74/019

  using temporary auxiliary substrates (H10W74/017 takes precedence) · CPC title

• H10W74/014

  using batch processing · CPC title

• H10W72/9413

  on encapsulations · CPC title

• H10W72/922

  Bond pads being integral with underlying chip-level interconnections · CPC title