Integrated physical coding sublayer and forward error correction in networking applications
US-11296722-B2 · Apr 5, 2022 · US
This page is not indexed by search engines while we improve data quality.
Song Cheng Wei patents
Song Cheng Wei is listed as an inventor on 26 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Song Cheng Wei |
| Total patents | 26 |
| First publication | Dec 31, 2015 |
| Latest publication | Apr 5, 2022 |
Notable patents
Publications ranked by popularity score, then publication date.
Integrated physical coding sublayer and forward error correction in networking applications
US-2020145022-A1 · May 7, 2020 · US
Integrated physical coding sublayer and forward error correction in networking applications
US-10574262-B2 · Feb 25, 2020 · US
Integrated physical coding sublayer and forward error correction in networking applications
US-10432218-B2 · Oct 1, 2019 · US
Integrated physical coding sublayer and forward error correction in networking applications
US-2019140771-A1 · May 9, 2019 · US
Integrated physical coding sublayer and forward error correction in networking applications
US-2019036645-A1 · Jan 31, 2019 · US
Decoding method, decoding apparatus and decoder
US-10187085-B2 · Jan 22, 2019 · US
Integrated physical coding sublayer and forward error correction in networking applications
US-10164734-B2 · Dec 25, 2018 · US
Integrated physical coding sublayer and forward error correction in networking applications
US-10164733-B2 · Dec 25, 2018 · US
Latency-optimized physical coding sublayer
US-10110335-B2 · Oct 23, 2018 · US
Recent patents
Latest publications not already listed above.
Latency-optimized physical coding sublayer
US-10103830-B2 · Oct 16, 2018 · US
Network clock synchronization
US-9820248-B2 · Nov 14, 2017 · US
Decoding method, decoding apparatus and decoder
US-2017134051-A1 · May 11, 2017 · US
Latency reduced error correction scheme with error indication function for burst error correction codes
US-9608669-B2 · Mar 28, 2017 · US
Sub-nanosecond distributed clock synchronization using alignment marker in ethernet IEEE 1588 protocol
US-9602271-B2 · Mar 21, 2017 · US
Latency-optimized physical coding sublayer
US-2017041093-A1 · Feb 9, 2017 · US
Latency-optimized physical coding sublayer
US-2017041094-A1 · Feb 9, 2017 · US
Network clock synchronization
US-2017006567-A1 · Jan 5, 2017 · US
Latency-optimized physical coding sublayer
US-9515817-B2 · Dec 6, 2016 · US
Latency-optimized physical coding sublayer
US-9515816-B2 · Dec 6, 2016 · US
Sub-nanosecond distributed clock synchronization using alignment marker in ethernet ieee 1588 protocol
US-2016352500-A1 · Dec 1, 2016 · US
Latency Reduced Error Correction Scheme with Error Indication Function for Burst Error Correction Codes
US-2016241259-A9 · Aug 18, 2016 · US
Integrated physical coding sublayer and forward error correction in networking applications
US-2015381312-A1 · Dec 31, 2015 · US
Latency-optimized physical coding sublayer
US-2015381338-A1 · Dec 31, 2015 · US
Latency-optimized physical coding sublayer
US-2015381339-A1 · Dec 31, 2015 · US
Integrated physical coding sublayer and forward error correction in networking applications
US-2015381316-A1 · Dec 31, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 25 |
| Globalfoundries Inc | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H04L25/14 | 20 |
| H04J3/0697 | 20 |
| H04L1/0041 | 12 |
| H04L7/0037 | 10 |
| H03M13/1515 | 10 |