Integrated physical coding sublayer and forward error correction in networking applications

Patent metadata

Field	Value
Publication number	US-11296722-B2
Application number	US-202016735802-A
Country	US
Kind code	B2
Filing date	Jan 7, 2020
Priority date	Jun 30, 2014
Publication date	Apr 5, 2022
Grant date	Apr 5, 2022

Abstract

Techniques for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer are provided. A PCS transmit structure is configured to receive data from a MAC sublayer, the PCS transmit structure comprising a first FEC hardware module that performs FEC encoding, in a first clock domain, on the data to generate FEC encoded data. Further, a PCS receive structure configured to receive the FEC encoded data from the PCS transmit structure, the PCS receive structure comprising a second FEC hardware module is configured to perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data.

First claim

What is claimed is:

1. A system comprising:
a physical coding sublayer (PCS) transmit structure configured to receive data from a media access control (MAC) sublayer, the PCS transmit structure comprising a first forward error-correction (FEC) hardware module configured to:
perform FEC encoding, in a first clock domain of the MAC sublayer, on the data to generate FEC encoded data, wherein the first clock domain comprises a MAC Interface (MI) clock domain;
wherein the PCS transmit structure is further configured to transmit the FEC encoded data from the first clock domain with a first clock cycle to a second clock domain with a second clock cycle, wherein the second clock domain corresponds to a physical medium attachment (PMA) sublayer and comprises a PMA clock domain; and

a PCS receive structure configured to receive the FEC encoded data from the PCS transmit structure, the PCS receive structure comprising a second FEC hardware module configured to:
perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data.

2. The system of claim 1 , wherein the first FEC hardware module performs Reed-Solomon encoding on one or more alignment markers and the data.

3. The system of claim 1 , wherein the second FEC hardware module performs Reed-Solomon decoding on the FEC encoded data.

4. The system of claim 1 , further comprising:
one or more physical media attachment (PMA) lanes configured to transmit the FEC encoded data from the PCS transmit structure to the PCS receive structure.

5. The system of claim 1 , further comprising:
one or more deskewing queues on the PCS receive structure, the one or more deskewing queues configured to deskew the FEC encoded data before one or more alignment markers are removed from the FEC decoded data.

6. The system of claim 1 , wherein the PCS transmit structure further comprises an encoder configured to encode, in the first clock domain, the data received from the MAC sublayer into PCS blocks before performing FEC encoding on the data; and
wherein the PCS receive structure further comprises a decoder configured to decode, in the second clock domain, the FEC decoded data into MAC blocks, wherein the FEC decoded data is received after FEC decoding is performed on the data by the second FEC hardware module.

7. A computer program product comprising a non-transitory computer-readable storage medium having computer-readable program code embodied therewith, the computer-readable program code comprising:
computer-readable program code configured to receive data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer;
computer-readable program code configured to perform forward error-correction (FEC) encoding, in a first clock domain of the MAC sublayer, on the data to generate FEC encoded data, wherein the PCS transmit structure is configured to transmit the FEC encoded data from the first clock domain with a first clock cycle to a second clock domain with a second clock cycle, wherein the first clock domain comprises a MAC Interface (MI) clock domain, and wherein the second clock domain corresponds to a physical medium attachment (PMA) sublayer and comprises a PMA clock domain; and
computer-readable program code configured to perform FEC decoding, in the second clock domain, on the FEC encoded data to generate FEC decoded data.

8. The computer program product of claim 7 , further comprising:
computer-readable program code configured to perform Reed-Solomon encoding on one or more alignment markers and the data in the PCS transmit structure.

9. The computer program product of claim 7 , wherein the PCS transmit structure further comprises an encoder configured to encode, in the first clock domain, the data received from the MAC sublayer into PCS blocks before performing FEC encoding on the data; and
wherein the PCS receive structure further comprises a decoder configured to decode, in the second clock domain, the FEC decoded data into MAC blocks, wherein the FEC decoded data is received after FEC decoding is performed on the data by the second FEC hardware module.

10. The computer program product of claim 7 , the computer-readable program code further comprising:
computer-readable program code configured to insert one or more alignment markers in the data in the PCS transmit structure; and
computer-readable program code configured to remove the one or more alignment markers from the FEC decoded data.

11. A method comprising:
receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer;
performing forward error-correction (FEC) encoding, in a first clock domain of the MAC sublayer, on the data in the PCS transmit structure to generate FEC encoded data, wherein the first clock domain comprises a MAC Interface (MI) clock domain;
transmitting the FEC encoded data from the first clock domain with a first clock cycle to a second clock domain with a second clock cycle, wherein the second clock domain corresponds to a physical medium attachment (PMA) sublayer and comprises a PMA clock domain; and
performing FEC decoding, in the second clock domain, on the FEC encoded data in the PCS receive structure to generate FEC decoded data.

12. The method of claim 11 , wherein performing the FEC encoding comprises performing Reed-Solomon encoding on one or more alignment markers and the data.

13. The method of claim 11 , wherein performing the FEC decoding comprises performing Reed-Solomon decoding on the FEC encoded data.

14. The method of claim 11 , wherein performing the FEC encoding comprises performing the FEC encoding on one or more 66-bit PCS blocks.

15. The method of claim 11 , wherein transmitting the FEC encoded data comprises transmitting the FEC encoded data on a high-speed serializer/deserializer.

16. The method of claim 11 , wherein the FEC encoded data is received at the PCS receive structure in one or more plesiochronous input first-in first-outs (FIFOs).

17. The method of claim 11 , wherein the PCS transmit structure further comprises an encoder configured to encode, in the first clock domain, the data received from the MAC sublayer into PCS blocks before performing FEC encoding on the data; and
wherein the PCS receive structure further comprises a decoder configured to decode, in the second clock domain, the FEC decoded data into MAC blocks, wherein the FEC decoded data is received after FEC decoding is performed on the data by the second FEC hardware module.

18. The method of claim 11 , the method further comprising:
inserting one or more alignment markers in the data in the PCS transmit structure; and
removing the one or more alignment markers from the FEC decoded data.

Assignees

• IBM

Inventors

• Basso Claude
• Song Cheng Wei
• Verplanken Fabrice Jean

Classifications

• H04L1/0041 Primary

  Arrangements at the transmitter end · CPC title

• H03M13/1105

  Decoding · CPC title

• G06F11/27

  Built-in tests · CPC title

• H04L25/49

  using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels {; Baseband coding techniques specific to data transmission systems (spectral shaping H04L25/03828)} · CPC title

• H03M13/25

  Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] {(modulation codes H03M13/31)} · CPC title