Integrated physical coding sublayer and forward error correction in networking applications

US10432218B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10432218-B2
Application numberUS-201816152514-A
CountryUS
Kind codeB2
Filing dateOct 5, 2018
Priority dateJun 30, 2014
Publication dateOct 1, 2019
Grant dateOct 1, 2019

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

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Techniques are provided for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer. Data is received at a PCS transmit structure from a MAC sublayer, and one or more alignment markers are inserted in the data. FEC encoding is performed, in a first clock domain, on the one or more alignment markers and the data in the PCS transmit structure to generate FEC encoded data. The FEC encoded data is transmitted from the first clock domain with a first clock cycle to a second clock domain with a second clock cycle, and the FEC encoded data is transmitted on one or more physical medium attachment (PMA) lanes to a PCS receive structure. FEC decoding is performed, in the second clock domain, on the FEC encoded data in the PCS receive structure to generate FEC decoded data.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer; inserting one or more alignment markers in the data; performing Forward Error Correction (FEC) encoding, in a first clock domain, on the one or more alignment markers and the data in the PCS transmit structure to generate FEC encoded data; transmitting the FEC encoded data from the first clock domain with a first clock cycle to a second clock domain with a second clock cycle; transmitting the FEC encoded data on one or more physical medium attachment (PMA) lanes to a PCS receive structure; and performing FEC decoding, in the second clock domain, on the FEC encoded data in the PCS receive structure to generate FEC decoded data. 2. The method of claim 1 , wherein performing the FEC encoding comprises performing Reed-Solomon encoding on the one or more alignment markers and the data. 3. The method of claim 1 , wherein performing the FEC decoding comprises performing Reed-Solomon decoding on the FEC encoded data. 4. The method of claim 1 , wherein performing the FEC encoding comprises performing the FEC encoding on one or more 66-bit PCS blocks. 5. The method of claim 1 , wherein transmitting the FEC encoded data comprises transmitting the FEC encoded data on a high-speed serializer/deserializer. 6. The method of claim 1 , wherein the FEC encoded data is received at the PCS receive structure in one or more plesiochronous input first-in first-outs (FIFOs). 7. The method of claim 1 , wherein the first clock domain comprises a media access control (MAC) Interface (MI) clock domain, and wherein the second clock domain comprises a physical medium attachment (PMA) clock domain. 8. The method of claim 1 , wherein the PCS transmit structure further comprises an encoder configured to encode, in the first clock domain, the data received from the MAC sublayer into PCS blocks before performing FEC encoding on the data; and wherein the PCS receive structure further comprises a decoder configured to decode, in the second clock domain, the FEC decoded data into MAC blocks, wherein the FEC decoded data is received after FEC decoding is performed on the data by the second FEC hardware module.

Assignees

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Classifications

  • Channel dividing arrangements {, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver} · CPC title

  • H04L1/0041Primary

    Arrangements at the transmitter end · CPC title

  • H03M13/03Primary

    Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words · CPC title

  • using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels {; Baseband coding techniques specific to data transmission systems (spectral shaping H04L25/03828)} · CPC title

  • by adding special lists or symbols to the coded information (G11B20/1806, G11B20/1866 take precedence) · CPC title

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What does patent US10432218B2 cover?
Techniques are provided for receiving data at a physical coding sublayer (PCS) transmit structure from a media access control (MAC) sublayer. Data is received at a PCS transmit structure from a MAC sublayer, and one or more alignment markers are inserted in the data. FEC encoding is performed, in a first clock domain, on the one or more alignment markers and the data in the PCS transmit structu…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H04L1/0041. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).