Adaptive parallelization for multi-scale simulation
US-11249813-B2 · Feb 15, 2022 · US
This page is not indexed by search engines while we improve data quality.
Smith Stephen Lee patents
Smith Stephen Lee is listed as an inventor on 33 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Smith Stephen Lee |
| Total patents | 33 |
| First publication | Mar 26, 2015 |
| Latest publication | Feb 15, 2022 |
Notable patents
Publications ranked by popularity score, then publication date.
Simulation scaling with DFT and non-DFT
US-10831957-B2 · Nov 10, 2020 · US
Mapping intermediate material properties to target properties to screen materials
US-10776560-B2 · Sep 15, 2020 · US
Estimation of effective channel length for FinFETs and nano-wires
US-10706209-B2 · Jul 7, 2020 · US
Multi-scale simulation including first principles band structure extraction
US-10685156-B2 · Jun 16, 2020 · US
Atomic scale grid for modeling semiconductor structures and fabrication processes
US-10606968-B2 · Mar 31, 2020 · US
Mapping Intermediate Material Properties to Target Properties to Screen Materials
US-2020089841-A1 · Mar 19, 2020 · US
Adaptive Parallelization For Multi-scale Simulation
US-2020089543-A1 · Mar 19, 2020 · US
Estimation of Effective Channel Length for FinFets and Nano-Wires
US-2020004922-A1 · Jan 2, 2020 · US
Characterizing target material properties based on properties of similar materials
US-10516725-B2 · Dec 24, 2019 · US
Recent patents
Latest publications not already listed above.
Adaptive parallelization for multi-scale simulation
US-10489212-B2 · Nov 26, 2019 · US
Estimation of effective channel length for FinFETs and nano-wires
US-10417373-B2 · Sep 17, 2019 · US
First principles design automation tool
US-10402520-B2 · Sep 3, 2019 · US
Atomic Scale Grid for Modeling Semiconductor Structures and Fabrication Processes
US-2019147123-A1 · May 16, 2019 · US
Atomic scale grid for modeling semiconductor structures and fabrication processes
US-10102318-B2 · Oct 16, 2018 · US
Parameter extraction of DFT
US-10049173-B2 · Aug 14, 2018 · US
Simulation Scaling With DFT and Non-DFT
US-2018144076-A1 · May 24, 2018 · US
Atomic Scale Grid for Modeling Semiconductor Structures and Fabrication Processes
US-2018113968-A1 · Apr 26, 2018 · US
Simulation scaling with DFT and non-DFT
US-9881111-B2 · Jan 30, 2018 · US
Atomic scale grid for modeling semiconductor structures and fabrication processes
US-9852242-B2 · Dec 26, 2017 · US
Iterative simulation with DFT and non-DFT
US-9836563-B2 · Dec 5, 2017 · US
Parameter Extraction of DFT
US-2017329882-A1 · Nov 16, 2017 · US
Parameter extraction of DFT
US-9727675-B2 · Aug 8, 2017 · US
Multi-scale simulation including first principles band structure extraction
US-2016335381-A1 · Nov 17, 2016 · US
Estimation Of Effective Channel Length for Finfets and Nano-wires
US-2016246915-A1 · Aug 25, 2016 · US
First principles design automation tool
US-2016232264-A1 · Aug 11, 2016 · US
Parameter extraction of dft
US-2016217234-A1 · Jul 28, 2016 · US
Mapping Intermediate Material Properties To Target Properties To Screen Materials
US-2016162625-A1 · Jun 9, 2016 · US
Atomic scale grid for modeling semiconductor structures and fabrication processes
US-2016070830-A1 · Mar 10, 2016 · US
Simulation scaling with dft and non-dft
US-2015088473-A1 · Mar 26, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Synopsys Inc | 33 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F30/20 | 29 |
| G06F30/398 | 25 |
| G06F17/5009 | 17 |
| G06F30/367 | 16 |
| G06F30/33 | 14 |