Semiconductor on insulator structure comprising a buried high resistivity layer
US-12557611-B2 · Feb 17, 2026 · US
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Peidous Igor patents
Peidous Igor is listed as an inventor on 57 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Peidous Igor |
| Total patents | 57 |
| First publication | Apr 30, 2015 |
| Latest publication | Feb 17, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
High resistivity silicon-on-insulator substrate comprising an isolation region
US-2025259884-A1 · Aug 14, 2025 · US
High resistivity silicon-on-insulator substrate comprising an isolation region
US-12300535-B2 · May 13, 2025 · US
High resistivity semiconductor-on-insulator wafer and a method of manufacture
US-11699615-B2 · Jul 11, 2023 · US
High resistivity silicon-on-insulator substrate comprising an isolation region
US-2023163022-A1 · May 25, 2023 · US
High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US-11655559-B2 · May 23, 2023 · US
High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US-11655560-B2 · May 23, 2023 · US
Semiconductor on insulator structure comprising a buried high resistivity layer
US-2023072964-A1 · Mar 9, 2023 · US
High resistivity SOI wafers and a method of manufacturing thereof
US-11594446-B2 · Feb 28, 2023 · US
Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
US-11587825-B2 · Feb 21, 2023 · US
Recent patents
Latest publications not already listed above.
Electromagnetic casting systems including furnaces and molds for producing silicon tubes
US-11534819-B2 · Dec 27, 2022 · US
Semiconductor on insulator structure comprising a buried high resistivity layer
US-11508612-B2 · Nov 22, 2022 · US
Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
US-11380576-B2 · Jul 5, 2022 · US
High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US-2022056616-A1 · Feb 24, 2022 · US
High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US-2021404088-A1 · Dec 30, 2021 · US
High resistivity semiconductor-on-insulator wafer and a method of manufacture
US-2021384070-A1 · Dec 9, 2021 · US
High resistivity soi wafers and a method of manufacturing thereof
US-2021327750-A1 · Oct 21, 2021 · US
High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US-11142844-B2 · Oct 12, 2021 · US
High resistivity semiconductor-on-insulator wafer and a method of manufacturing
US-11139198-B2 · Oct 5, 2021 · US
High resistivity SOI wafers and a method of manufacturing thereof
US-11081386-B2 · Aug 3, 2021 · US
Methods for assessing semiconductor structures
US-11081407-B2 · Aug 3, 2021 · US
Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
US-2021035855-A1 · Feb 4, 2021 · US
High resistivity SOI wafers and a method of manufacturing thereof
US-10910257-B2 · Feb 2, 2021 · US
Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
US-2021013091-A1 · Jan 14, 2021 · US
High resistivity soi wafers and a method of manufacturing thereof
US-2021005507-A1 · Jan 7, 2021 · US
Method of preparing an isolation region in a high resistivity silicon-on-insulator substrate
US-10825718-B2 · Nov 3, 2020 · US
Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress
US-10784146-B2 · Sep 22, 2020 · US
Electromagnetic casting systems including furnaces and molds for producing silicon tubes
US-2020238370-A1 · Jul 30, 2020 · US
High resistivity single crystal silicon ingot and wafer having improved mechanical strength
US-2020216975-A1 · Jul 9, 2020 · US
Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition
US-10672645-B2 · Jun 2, 2020 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Globalwafers Co Ltd | 47 |
| Sunedison Semiconductor Ltd Uen201334164H | 13 |
| Sunedison Semiconductor Ltd | 3 |
| Lam Res Corp | 2 |
| Peidous Igor | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W10/181 | 44 |
| H10P90/1916 | 40 |
| H01L21/76254 | 33 |
| H10P90/1914 | 26 |
| H10P14/3411 | 26 |