Right-hand semiconductor device and system having a right-hand semiconductor device
US-2025323129-A1 · Oct 16, 2025 · US
This page is not indexed by search engines while we improve data quality.
Pedone Daniel patents
Pedone Daniel is listed as an inventor on 21 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Pedone Daniel |
| Total patents | 21 |
| First publication | Nov 12, 2015 |
| Latest publication | Oct 16, 2025 |
Notable patents
Publications ranked by popularity score, then publication date.
Semiconductor package including one or more solder joints electrically and mechanically coupling first and second power semiconductor chips to a leadframe part and method for fabricating thea semiconductor package
US-2025105103-A1 · Mar 27, 2025 · US
Semiconductor package and method for fabricating a semiconductor package
US-12205870-B2 · Jan 21, 2025 · US
Linear spacer for spacing a carrier of a package
US-11942383-B2 · Mar 26, 2024 · US
Method for Fabricating a Power Semiconductor Device
US-2024096842-A1 · Mar 21, 2024 · US
Semiconductor wafer, clip and semiconductor device
US-2023411336-A1 · Dec 21, 2023 · US
Semiconductor Package and Method for Fabricating a Semiconductor Package
US-2023290709-A1 · Sep 14, 2023 · US
Method for processing a semiconductor wafer, semiconductor wafer, clip and semiconductor device
US-11756917-B2 · Sep 12, 2023 · US
Semiconductor package and method for fabricating a semiconductor package
US-11688670-B2 · Jun 27, 2023 · US
Linear spacer for spacing a carrier of a package
US-2022148934-A1 · May 12, 2022 · US
Recent patents
Latest publications not already listed above.
Power semiconductor device with integrated temperature protection
US-11276680-B2 · Mar 15, 2022 · US
Method for processing a semiconductor wafer, semiconductor wafer, clip and semiconductor device
US-2021305198-A1 · Sep 30, 2021 · US
Power Semiconductor Device and Method for Fabricating a Power Semiconductor Device
US-2021225795-A1 · Jul 22, 2021 · US
Semiconductor Package and Method for Fabricating a Semiconductor Package
US-2021134708-A1 · May 6, 2021 · US
Insulated gate bipolar transistor comprising negative temperature coefficient thermistor
US-9825023-B2 · Nov 21, 2017 · US
Method for processing a semiconductor workpiece and semiconductor workpiece
US-9627335-B2 · Apr 18, 2017 · US
Semiconductor devices with transistor cells and thermoresistive element
US-9576944-B2 · Feb 21, 2017 · US
Semiconductor Devices with Transistor Cells and Thermoresistive Element
US-2016163689-A1 · Jun 9, 2016 · US
Power Semiconductor Device with Temperature Protection
US-2016133620-A1 · May 12, 2016 · US
Insulated Gate Bipolar Transistor Comprising Negative Temperature Coefficient Thermistor
US-2016111415-A1 · Apr 21, 2016 · US
Method for Processing a Semiconductor Workpiece and Semiconductor Workpiece
US-2015325535-A1 · Nov 12, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Infineon Technologies Austria Ag | 13 |
| Infineon Technologies Ag | 6 |
| Infineon Technologies Austria | 2 |
| Infineon Technologies Ag | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W90/736 | 12 |
| H10W72/0198 | 10 |
| H10W72/352 | 10 |
| H01L24/83 | 10 |
| H10W72/923 | 9 |