Arrangement for Determining a Printed Circuit Board Identifier
US-2024298404-A1 · Sep 5, 2024 · US
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Matschnig Martin patents
Matschnig Martin is listed as an inventor on 19 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Matschnig Martin |
| Total patents | 19 |
| First publication | Mar 2, 2017 |
| Latest publication | Sep 5, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Method for storing key data in an electronic component
US-12058254-B2 · Aug 6, 2024 · US
Method for Checking the Integrity of Reloadable Functional Units
US-2023385500-A1 · Nov 30, 2023 · US
Method for realizing a neural network
US-11704561-B2 · Jul 18, 2023 · US
Method for managing soft IP licenses on a partially reconfigurable hardware system
US-11550881-B2 · Jan 10, 2023 · US
Method and system for predictive maintenance of integrated circuits
US-11525858-B2 · Dec 13, 2022 · US
Method for Storing Key Data in an Electronic Component
US-2021320792-A1 · Oct 14, 2021 · US
Method for Managing Soft IP Licenses on a Partially Reconfigurable Hardware System
US-2021200839-A1 · Jul 1, 2021 · US
Method for Realizing a Neural Network
US-2021097388-A1 · Apr 1, 2021 · US
Method and System for Predictive Maintenance of Integrated Circuits
US-2020166568-A1 · May 28, 2020 · US
Recent patents
Latest publications not already listed above.
Method for optimal arrangement of a random number generator
US-10635401-B2 · Apr 28, 2020 · US
Method for adjusting pull resistors of an electronic module
US-10416738-B2 · Sep 17, 2019 · US
Method for determining system reliability of a logic circuit
US-10346570-B2 · Jul 9, 2019 · US
Method for Optimal Arrangement of a Random Number Generator
US-2018349099-A1 · Dec 6, 2018 · US
Method for analyzing a logic circuit
US-10146937-B2 · Dec 4, 2018 · US
Method For Determining System Reliability Of A Logic Circuit
US-2017206295-A1 · Jul 20, 2017 · US
Method for Adjusting Pull Resistors of an Electronic Module
US-2017199555-A1 · Jul 13, 2017 · US
Method for protecting a computer system from side-channel attacks
US-2017141912-A1 · May 18, 2017 · US
Method for analyzing a logic circuit
US-2017061124-A1 · Mar 2, 2017 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Siemens Ag | 16 |
| Siemens Ag Oesterreich | 3 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F21/76 | 7 |
| G06F30/367 | 4 |
| G06F30/33 | 4 |
| G06F21/70 | 4 |
| G06F17/5022 | 4 |