Non-linearity compensation method for applying non-linearity compensation that is source impedance dependent or making source impedance independent of off-chip components
US-2026045962-A1 · Feb 12, 2026 · US
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Egan Nathan patents
Egan Nathan is listed as an inventor on 15 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Egan Nathan |
| Total patents | 15 |
| First publication | Jul 21, 2016 |
| Latest publication | Feb 12, 2026 |
Notable patents
Publications ranked by popularity score, then publication date.
Circuit and method for measuring and correcting interleaving spur of at least one time-interleaved digital-to-analog converter in delta-sigma analog-to-digital converter
US-2025183909-A1 · Jun 5, 2025 · US
Noise shaping in digital-to-analog converters using randomizing encoders
US-12261616-B2 · Mar 25, 2025 · US
Digital-to-analog converters with triode switches
US-2024113727-A1 · Apr 4, 2024 · US
Noise shaping in digital-to-analog converters using randomizing encoders
US-2023412184-A1 · Dec 21, 2023 · US
LSB dithering for segmented DACs
US-11728821-B2 · Aug 15, 2023 · US
Lsb dithering for segmented dacs
US-2022271771-A1 · Aug 25, 2022 · US
High-speed digital-to-analog converter
US-10855306-B2 · Dec 1, 2020 · US
High-speed digital-to-analog converter
US-2020076446-A1 · Mar 5, 2020 · US
ΔΣ modulator with excess loop delay compensation
US-10075181-B2 · Sep 11, 2018 · US
Recent patents
Latest publications not already listed above.
Vco-based continuous-time sigma delta modulator equipped with truncation circuit and phase-domain excess loop delay compensation
US-2017194984-A1 · Jul 6, 2017 · US
VCO-based continuous-time sigma delta modulator equipped with truncation circuit and phase-domain excess loop delay compensation
US-9634687-B2 · Apr 25, 2017 · US
System and method for measuring the DC-transfer characteristic of an analog-to-digital converter
US-9584146-B2 · Feb 28, 2017 · US
Vco-based continuous-time sigma delta modulator equipped with truncation circuit and phase-domain excess loop delay compensation
US-2016365870-A1 · Dec 15, 2016 · US
System and method for measuring the dc-transfer characteristic of an analog-to-digital converter
US-2016211861-A1 · Jul 21, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Mediatek Inc | 9 |
| Mediatek Singapore Pte Ltd | 6 |
| Huang Sheng Jui | 1 |
| Egan Nathan | 1 |
| Kesharwani Divya | 1 |
Top CPC classifications
Most common classification codes across this inventor's patents.