VCO-based continuous-time sigma delta modulator equipped with truncation circuit and phase-domain excess loop delay compensation

US9634687B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9634687-B2
Application numberUS-201615069951-A
CountryUS
Kind codeB2
Filing dateMar 14, 2016
Priority dateJun 10, 2015
Publication dateApr 25, 2017
Grant dateApr 25, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  5. First independent claim

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Abstract

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A continuous-time sigma-delta modulator includes a VCO-based quantizer, a rotator, a truncation circuit and a digital-to-analog converter (DAC). The VCO-based quantizer is arranged to generate a thermometer code based on an input signal and a feedback signal. The rotator is coupled to the VCO-based quantizer, and is arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern. The truncation circuit is coupled to the rotator, and is arranged to extract a most significant bit (MSB) part from the rearranged thermometer code. The DAC is coupled to the truncation circuit, and is arranged to generate the feedback signal according to at least the MSB part. Two alternative continuous-time sigma-delta modulators are also disclosed.

First claim

Opening claim text (preview).

What is claimed is: 1. A continuous-time sigma-delta modulator, comprising: a VCO-based quantizer, arranged to generate a thermometer code based on an input signal and a feedback signal; a rotator, coupled to the VCO-based quantizer, arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern; a truncation circuit, coupled to the rotator, arranged to extract a most significant bit (MSB) part from the rearranged thermometer code, wherein bits with a specific bit interval of the rearranged thermometer code are determined to be the MSB part, remaining bits of the rearranged thermometer code are determined to be a least significant bit (LSB) set, and the truncation circuit comprises: a transition detector, arranged to determine a 0 and 1 bit transition position of the MSB part and generate a transition position; and a multiplexer, arranged to determine a LSB part from the LSB set according to the transition position; and a digital-to-analog converter (DAC), coupled to the truncation circuit, arranged to generate the feedback signal according to at least the MSB part. 2. The continuous-time sigma-delta modulator of claim 1 , wherein the specific bit interval of the rearranged thermometer code is determined based on a truncation bit number. 3. The continuous-time sigma-delta modulator of claim 1 , wherein the specific pattern includes at most a single 0 and 1 bit transition. 4. The continuous-time sigma-delta modulator of claim 1 , further comprising: an excess loop delay compensation (ELDC) circuit, coupled between the rotator and the truncation circuit, wherein the ELDC circuit is arranged to generate the phase shift to the rotator based on the MSB part. 5. A continuous-time sigma-delta modulator, comprising: a VCO-based quantizer, arranged to generate a thermometer code based on an input signal and a feedback signal; a rotator, coupled to the VCO-based quantizer, arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern; a truncation circuit, coupled to the rotator, arranged to extract a most significant bit (MSB) part from the rearranged thermometer code, wherein the truncation circuit is further arranged to extract a least significant bit (LSB) part from the rearranged thermometer code; a shaping circuit, coupled between the rotator and the truncation circuit, wherein the shaping circuit is arranged to generate the phase shift to the rotator based on the LSB part; and a digital-to-analog converter (DAC), coupled to the truncation circuit, arranged to generate the feedback signal according to at least the MSB part. 6. The continuous-time sigma-delta modulator of claim 5 , wherein the LSB part is frequency-shaped to high frequency. 7. A continuous-time sigma-delta modulator, comprising: a VCO-based quantizer, arranged to generate a thermometer code based on an input signal and a feedback signal; a rotator, coupled to the VCO-based quantizer, arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern; a truncation circuit, coupled to the rotator, arranged to extract a most significant bit (MSB) part from the rearranged thermometer code, wherein the truncation circuit is further arranged to extract a least significant bit (LSB) part from the rearranged thermometer code; a shaping circuit, coupled between the VCO-based quantizer and the truncation circuit, wherein the shaping circuit is arranged to generate the phase shift based on the LSB part; and a digital-to-analog converter (DAC), coupled to the truncation circuit, arranged to generate the feedback signal according to at least the MSB part. 8. The continuous-time sigma-delta modulator of claim 7 , wherein the LSB part is frequency-shaped to high frequency. 9. A continuous-time sigma-delta modulator, comprising: a VCO-based quantizer, arranged to generate a thermometer code based on an input signal and a feedback signal; a rotator, coupled to the VCO-based quantizer, arranged to generate a phase-shifted thermometer code based on the thermometer code and a phase shift, and generate a rearranged thermometer code based on the phase-shifted thermometer code to comply with a specific pattern; a truncation circuit, coupled to the rotator, arranged to extract a most significant bit (MSB) part from the rearranged thermometer code, wherein the truncation circuit is further arranged to extract a least significant bit (LSB) part from the rearranged thermometer code; and a digital-to-analog converter (DAC), coupled to the truncation circuit, arranged to generate the feedback signal according to at least the MSB part, wherein the DAC is arranged to generate the feedback signal according to the MSB part and the LSB part. 10. The continuous-time sigma-delta modulator of claim 1 , wherein the rotator comprises: an XOR circuit, arranged to generate the phase-shifted thermometer code by performing an XOR operation on the thermometer code and the phase shift; and a switch circuit, arranged to generate the rearranged thermometer code based on the phase-shifted thermometer code to comply with the specific pattern. 11. A continuous-time sigma-delta modulator, comprising: a VCO-based quantizer, arranged to generate a thermometer code based on an input signal and a feedback signal; an XOR circuit, arranged to generate a phase-shifted thermometer code by performing an XOR operation on the thermometer code and a phase shift; a truncation circuit, coupled to the XOR circuit, arranged to extract a most significant bit (MSB) part from the phase-shifted thermometer code, wherein the truncation circuit is arranged to generate the MSB part according to a sum of bits with a specific bit interval of the phase-shifted thermometer code and a truncation bit number, remaining bits of the phase-shifted thermometer code are determined to be a least significant bit (LSB) set, and the truncation circuit comprises: a bit extension circuit, arranged to extend the phase-shifted thermometer code by inserting a bit duplicated from a least significant bit of the phase-shifted thermometer code to a bit position higher than a most significant bit of the phase-shifted thermometer code; a transition detector, arranged to determine a 0 to 1 bit transition position and a 1 to 0 bit transition position of the bits with the specific bit interval of the bit extended phase-shifted thermometer code and generate a first transition position and a second transition position; a multiplexer, arranged to determine a first LSB result and a second LSB result from the LSB set according to the first transition position and the second transition position; and a LSB generator, arranged to generate a LSB part according to the first LSB result and the second LSB result; and a digital-to-analog converter (DAC), coupled to the truncation circuit, arranged to generate the feedback signal according to at least the MSB part. 12. The continuous-time sigma-delta modulator of claim 11 , wherein the specific bit interval of the phase-shifted thermometer code is determined based on the truncation bit number. 13. A continuous-time sigma-delta modulator, comprising: a VCO-based quantizer, arranged to generate a thermometer code based on an input signal and a feedback sign

Assignees

Inventors

Classifications

  • Details of the digital/analogue conversion in the feedback path · CPC title

  • H03M3/422Primary

    having one quantiser only · CPC title

  • with intermediate conversion to frequency of pulses · CPC title

  • with lower resolution, e.g. single bit, feedback · CPC title

  • H03M3/37Primary

    Compensation or reduction of delay or phase error · CPC title

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What does patent US9634687B2 cover?
A continuous-time sigma-delta modulator includes a VCO-based quantizer, a rotator, a truncation circuit and a digital-to-analog converter (DAC). The VCO-based quantizer is arranged to generate a thermometer code based on an input signal and a feedback signal. The rotator is coupled to the VCO-based quantizer, and is arranged to generate a phase-shifted thermometer code based on the thermometer …
Who is the assignee on this patent?
Mediatek Inc
What technology area does this patent fall under?
Primary CPC classification H03M3/422. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).