Method for forming semiconductor device structure having conductive structure with twin boundaries
US-10475742-B2 · Nov 12, 2019 · US
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Chiu Chwei-Ching patents
Chiu Chwei-Ching is listed as an inventor on 12 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Chiu Chwei-Ching |
| Total patents | 12 |
| First publication | Aug 18, 2016 |
| Latest publication | Nov 12, 2019 |
Notable patents
Publications ranked by popularity score, then publication date.
Method for forming semiconductor device structure having conductive structure with twin boundaries
US-10283450-B2 · May 7, 2019 · US
Method for forming semiconductor device structure having conductive structure with twin boundaries
US-2019103351-A1 · Apr 4, 2019 · US
Method of manufacturing a semiconductor device
US-9941159-B2 · Apr 10, 2018 · US
Semiconductor device components and methods
US-9875964-B2 · Jan 23, 2018 · US
Method for forming semiconductor device structure having conductive structure with twin boundaries
US-2017338178-A1 · Nov 23, 2017 · US
Interconnect structure with twin boundaries and method for forming the same
US-9761523-B2 · Sep 12, 2017 · US
Interconnect structure with twin boundaries and method for forming the same
US-2017053865-A1 · Feb 23, 2017 · US
Method of manufacturing a semiconductor device
US-2016372368-A1 · Dec 22, 2016 · US
MiM capacitor
US-9502886-B2 · Nov 22, 2016 · US
Recent patents
Latest publications not already listed above.
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Taiwan Semiconductor Mfg Co Ltd | 13 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W20/081 | 10 |
| H10W20/057 | 10 |
| H10W20/43 | 10 |
| H01L21/76879 | 10 |
| H01L21/76802 | 10 |