Semiconductor package metal shadowing checks
US-10956649-B2 · Mar 23, 2021 · US
This page is not indexed by search engines while we improve data quality.
Call Anson J patents
Call Anson J is listed as an inventor on 21 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Call Anson J |
| Total patents | 21 |
| First publication | Feb 7, 2017 |
| Latest publication | Mar 23, 2021 |
Notable patents
Publications ranked by popularity score, then publication date.
Connected plane stiffener within integrated circuit chip carrier
US-10770385-B2 · Sep 8, 2020 · US
Reduction of laminate failure in integrated circuit (IC) device carrier
US-10607928-B1 · Mar 31, 2020 · US
Connected Plane Stiffener Within Integrated Circuit Chip Carrier
US-2020035593-A1 · Jan 30, 2020 · US
Semiconductor package via stack checking
US-10546096-B2 · Jan 28, 2020 · US
Semiconductor package metal shadowing checks
US-2019377850-A1 · Dec 12, 2019 · US
Split ball grid array pad for multi-chip modules
US-10483233-B2 · Nov 19, 2019 · US
Semiconductor package metal shadowing checks
US-10423752-B2 · Sep 24, 2019 · US
Reduction of solder interconnect stress
US-10276534-B2 · Apr 30, 2019 · US
Method of fabricating contacts of an electronic package structure to reduce solder interconnect stress
US-10276535-B2 · Apr 30, 2019 · US
Recent patents
Latest publications not already listed above.
Semiconductor package via stack checking
US-2019102504-A1 · Apr 4, 2019 · US
Semiconductor package metal shadowing checks
US-2019102506-A1 · Apr 4, 2019 · US
Laminate substrate thermal warpage prediction for designing a laminate substrate
US-10108753-B2 · Oct 23, 2018 · US
Reduction of solder interconnect stress
US-2018061799-A1 · Mar 1, 2018 · US
Reduction of solder interconnect stress
US-2018061800-A1 · Mar 1, 2018 · US
Reduction of solder interconnect stress
US-9865557-B1 · Jan 9, 2018 · US
Laminate substrate thermal warpage prediction for designing a laminate substrate
US-2017351783-A1 · Dec 7, 2017 · US
Split ball grid array pad for multi-chip modules
US-2017141078-A1 · May 18, 2017 · US
Split ball grid array pad for multi-chip modules
US-9633914-B2 · Apr 25, 2017 · US
Split ball grid array pad for multi-chip modules
US-2017077000-A1 · Mar 16, 2017 · US
In-plane copper imbalance for warpage prediction
US-9563732-B1 · Feb 7, 2017 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| IBM | 21 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W90/724 | 12 |
| H10W70/65 | 12 |
| H10W70/093 | 9 |
| H01L24/16 | 9 |
| H01L21/4853 | 8 |