Multiprocessor Programming Toolkit for Design Reuse
US-2024394048-A1 · Nov 28, 2024 · US
This page is not indexed by search engines while we improve data quality.
Beardslee John Mark patents
Beardslee John Mark is listed as an inventor on 35 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Beardslee John Mark |
| Total patents | 35 |
| First publication | Nov 24, 2015 |
| Latest publication | Nov 28, 2024 |
Notable patents
Publications ranked by popularity score, then publication date.
Multiprocessor programming toolkit for design reuse
US-11914989-B2 · Feb 27, 2024 · US
Memory-network processor with programmable optimizations
US-11900124-B2 · Feb 13, 2024 · US
Dynamic Reconfiguration of Applications on a Multi-Processor Embedded System
US-2023409380-A1 · Dec 21, 2023 · US
Real Time Analysis and Control for a Multiprocessor System
US-2023359548-A1 · Nov 9, 2023 · US
Dynamic reconfiguration of applications on a multi-processor embedded system
US-11726812-B2 · Aug 15, 2023 · US
Real time analysis and control for a multiprocessor system
US-11720479-B2 · Aug 8, 2023 · US
Memory-network processor with programmable optimizations
US-2023153117-A1 · May 18, 2023 · US
Memory-network processor with programmable optimizations
US-11544072-B2 · Jan 3, 2023 · US
Multiprocessor Programming Toolkit for Design Reuse
US-2022050676-A1 · Feb 17, 2022 · US
Recent patents
Latest publications not already listed above.
Multiprocessor programming toolkit for design reuse
US-11163558-B2 · Nov 2, 2021 · US
Dynamic Reconfiguration of Applications on a Multi-Processor Embedded System
US-2021294643-A1 · Sep 23, 2021 · US
Memory-network processor with programmable optimizations
US-2021208895-A1 · Jul 8, 2021 · US
Dynamic reconfiguration of applications on a multi-processor embedded system
US-11023272-B2 · Jun 1, 2021 · US
Memory-network processor with programmable optimizations
US-11016779-B2 · May 25, 2021 · US
Programming a multi-processor system
US-10776085-B2 · Sep 15, 2020 · US
Multiprocessor Programming Toolkit for Design Reuse
US-2020218534-A1 · Jul 9, 2020 · US
Multiprocessor programming toolkit for design reuse
US-10592233-B2 · Mar 17, 2020 · US
Memory-Network Processor with Programmable Optimizations
US-2019369990-A1 · Dec 5, 2019 · US
Real Time Analysis and Control for a Multiprocessor System
US-2019050324-A1 · Feb 14, 2019 · US
Real time analysis and control for a multiprocessor system
US-10114739-B2 · Oct 30, 2018 · US
Dynamic Reconfiguration of Applications on a Multi-Processor Embedded System
US-2018260240-A1 · Sep 13, 2018 · US
Programming a Multi-Processor System
US-2018232218-A1 · Aug 16, 2018 · US
Dynamic reconfiguration of applications on a multi-processor embedded system
US-9990227-B2 · Jun 5, 2018 · US
Multiprocessor Programming Toolkit for Design Reuse
US-2018143824-A1 · May 24, 2018 · US
Programming a multi-processor system
US-9965258-B2 · May 8, 2018 · US
Multiprocessor programming toolkit for design reuse
US-9904542-B2 · Feb 27, 2018 · US
Real Time Analysis and Control for a Multiprocessor System
US-2017010958-A1 · Jan 12, 2017 · US
Memory-network processor with programmable optimizations
US-2016328231-A1 · Nov 10, 2016 · US
Real time analysis and control for a multiprocessor system
US-9477585-B2 · Oct 25, 2016 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Coherent Logix Inc | 38 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| G06F9/4856 | 8 |
| G06F12/00 | 8 |
| G06F9/5066 | 8 |
| G06F9/461 | 8 |
| G06F9/485 | 8 |