Dynamic reconfiguration of applications on a multi-processor embedded system

Patent metadata

Field	Value
Publication number	US-9990227-B2
Application number	US-201514921281-A
Country	US
Kind code	B2
Filing date	Oct 23, 2015
Priority date	May 17, 2013
Publication date	Jun 5, 2018
Grant date	Jun 5, 2018

Abstract

A multiprocessor system and method for swapping applications executing on the multiprocessor system are disclosed. The plurality of applications may include a first application and a plurality of other applications. The first application may be dynamically swapped with a second application. The swapping may be performed without stopping the plurality of other applications. The plurality of other applications may continue to execute during the swapping to perform a real-time operation and process real-time data. After the swapping, the plurality of other applications may continue to execute with the second application, and at least a subset of the plurality of other applications may communicate with the second application to perform the real time operation and process the real time data.

First claim

What is claimed is:

1. A method, comprising:
loading a plurality of applications on a multiprocessor system, wherein the plurality of applications includes a first application and a plurality of other applications;
wherein the multiprocessor system includes a plurality of processors and a plurality of memories interspersed among the plurality of processors coupled together to form a first communication fabric, and a second communication fabric, wherein the second communication fabric includes a serial bus;
wherein loading the plurality of applications includes distributing instructions and data from the plurality of applications among different respective ones of the plurality of memories for execution by associated processors;
executing the plurality of applications on the multiprocessor system, wherein the plurality of applications executes together and communicates with each other to perform a real time operation, wherein executing the plurality of applications includes copying, from an input of an isolator cell, data that includes a plurality of data elements to an output of the isolator cell;
sending a command to a master task by a system controller via the serial bus included in the multiprocessor system;
initiating application swapping by the master task in response to receiving the command from a system controller; and
swapping the first application of the plurality of applications with a second application;
wherein swapping the first application with the second application includes continuing execution of each application of the plurality of other applications, and in response to determining the first application is upstream to the isolator cell, repeatedly sending, by the isolator cell, previously stored data from one or more buffers included in the isolator cell, to an application downstream of the isolator cell; and
wherein upon completion of the swapping, the plurality of other applications continues to execute with the second application, and wherein at least a subset of the plurality of other applications communicates with the second application to perform the real time operation.

2. The method of claim 1 , wherein prior to swapping the first application with the second application, the first application executes on a first subset of the plurality of processors; and wherein swapping the first application with the second application includes:
stopping the first application on the first subset of the plurality of processors;
saving a state of the first application; and
loading the second application into memories associated with the first subset of the plurality of processors.

3. The method of claim 2 , wherein swapping the first application with the second application further includes decoupling communication of the first application with one or more of the plurality of other applications.

4. The method of claim 3 , wherein swapping the first application with the second application further includes, after loading the second application, coupling communication of the second application with the one or more of the plurality of other applications.

5. The method of claim 1 , wherein swapping the first application with the second application includes loading the second application into two or more memories of the plurality of memories, wherein loading the second application includes sending program instructions of the second application through the multiprocessor system along two or more swapping routes, and wherein each of the swapping routes is associated with one of the two or more memories.

6. The method of claim 5 , wherein the two or more swapping routes share a first part in common, and wherein the first part includes a route from an input/output (I/O) port of the multiprocessor system to an endpoint within the multiprocessor system.

7. A multiprocessor system, comprising:
a plurality of processors;
a plurality of memories interspersed among the processors;
a plurality of isolator cells coupled to the plurality of processors;
a first communication fabric interconnecting the plurality of processors and the plurality of memories interspersed among the processors, wherein the first communication fabric includes a plurality of buffer memories interspersed among at least a subset of the plurality of processors; and
a second communication fabric interconnecting the plurality of processors, wherein the second communication fabric includes a serial bus;
wherein a particular buffer memory of the plurality of buffer memories is configured to transfer data between applications executing in the multiprocessor system, wherein the data includes a plurality of data elements;
wherein, during execution of a plurality of applications on the multiprocessor system to perform a real time operation that includes receipt or transmission of real time data and processing of the real time data;
wherein a particular isolator cell of the plurality of isolator cells is configured to copy data from an of the particular isolator cell to an output of the isolator cell;
in response to swapping of a first application with a second application, the particular isolator cell is further configured to, in response to a determination that the first application is upstream of the particular isolator cell, repeatedly send data previous stored in a buffer included in the particular isolator cell to an application of the plurality of applications downstream of the particular isolator cell;
wherein the first communication fabric is further configured to send a command to a master task by a system controller via the serial bus; and
wherein swapping of the first application with the second application is initiated by the master task in response to receiving the command from the system controller.

8. The multiprocessor system of claim 7 , wherein prior to swapping the first application with the second application, the first application communicates structured data elements via a first buffer memory, wherein each data element has a beginning boundary and an ending boundary, and wherein the first buffer memory is configured to:
receive a request to discontinue data communication after transmission of a first data element has been initiated; and
continue transmission of the first data element up to the ending boundary of the first data element.

9. The multiprocessor system of claim 8 , wherein the first application is on a downstream side of a first buffer memory, wherein the first buffer memory is configurable to discontinue acceptance of data from a sending application during said swapping.

10. The multiprocessor system of claim 7 , further comprising a plurality of data memory routers (DMRs) coupled between the plurality of processors, wherein the plurality of DMRs includes the plurality of memories interspersed among the processors.

11. The multiprocessor system of claim 7 , wherein the first communication fabric is further configured to load the second application into two or more memories of the plurality of memories, wherein to load the second application, the first communication fabric is further configured to send program instructions of the second application via two or more swapping routes, and wherein each of the swapping routes is associated with one of the two or more memories.

12. The multiprocessor system of claim 11 , wherein the two or more swapping routes share a first part in common, and wherein the first part includes a route from an input/output (I/O) port of the multiprocessor system to an endpoint within the multiprocessor system.

13. The multiprocessor system of claim 7 , wherein the first application is on a downstream side of a first buffer me

Assignees

• Coherent Logix Inc
• Coherent Logix Inc

Inventors

• Kaku Wilbur William
• Purnell Michael Lyle
• Ellis Geoffrey Neil
• Beardslee John Mark
• Shang Zhong Qing
• Wang Teng-I
• Lim Stephen E

Classifications

• G06F9/485 Primary

  Task life-cycle, e.g. stopping, restarting, resuming execution (G06F9/4881 takes precedence) · CPC title

• G06F9/5066

  Algorithms for mapping a plurality of inter-dependent sub-tasks onto a plurality of physical CPUs (mappping at compile time, see G06F8/451) · CPC title

• G06F8/656

  while running · CPC title

• G06F12/00

  Accessing, addressing or allocating within memory systems or architectures (digital input from, or digital output to record carriers, e.g. to disk storage units, G06F3/06) · CPC title

• G06F9/445

  Program loading or initiating (bootstrapping G06F9/4401; security arrangements for program loading or initiating G06F21/57) · CPC title