Multiprocessor programming toolkit for design reuse

Patent metadata

Field	Value
Publication number	US-10592233-B2
Application number	US-201815872421-A
Country	US
Kind code	B2
Filing date	Jan 16, 2018
Priority date	Nov 6, 2012
Publication date	Mar 17, 2020
Grant date	Mar 17, 2020

Abstract

Techniques for specifying and implementing a software application targeted for execution on a multiprocessor array (MPA). The MPA may include a plurality of processing elements, supporting memory, and a high bandwidth interconnection network (IN), communicatively coupling the plurality of processing elements and supporting memory. In some embodiments, software code may include first program instructions executable to perform a function. In some embodiments, the software code may also include one or more language constructs that are configurable to specify one or more parameter inputs. In some embodiments, the one or more parameter inputs are configurable to specify a set of hardware resources usable to execute the software code. In some embodiments, the hardware resources include multiple processors and may include multiple supporting memories.

First claim

What is claimed is:

1. A non-transitory computer-readable medium that stores software code deployable on a multiprocessor array (MPA), wherein the software code comprises:
a cell definition that includes:
first program instructions executable to perform a first function; and
one or more first language constructs which are user configurable to specify one or more parameter inputs;
wherein the one or more parameter inputs are user configurable to specify properties of a set of hardware resources usable to execute the software code, wherein the hardware resources include a plurality of processors and a plurality of memories; and
wherein multiple instances of the first program instructions specified by the cell definition are deployable, based on user input selecting the cell and specifying one or more different parameter inputs for ones of the instances, in different hardware portions of at least one MPA to perform the first function for one or more software applications, such that amounts of hardware resources in the respective hardware portion on which one or more respective instances of the cell are deployed are different and are based on the user-specified one or more parameter inputs.

2. The non-transitory computer-readable medium of claim 1 , where respective first and second instantiations of the cell are deployable on at least one MPA for different respective software applications.

3. The non-transitory computer-readable medium of claim 1 , wherein the respective instances of the cell utilizes different numbers of processors of the MPA based on configuration of the one or more parameter inputs.

4. The non-transitory computer-readable medium of claim 1 , wherein the one or more first language constructs are further user configurable to specify one or more communication ports, wherein the one or more communication ports are user configurable to specify communication with other software code in a software application;
wherein instances of the cell comprise respective configurations of the one or more communication ports specifying connectivity of the one or more communication ports with other software code deployed on the MPA.

5. The non-transitory computer-readable medium of claim 4 , wherein the one or more communication ports include one or more fabric ports and one or more shared memory ports.

6. The non-transitory computer-readable medium of claim 1 , wherein the one or more parameter inputs further modify an operation of the first function.

7. The non-transitory computer-readable medium of claim 1 , wherein the respective instantiations of the cell utilize different amounts of memory to store temporary state when performing the first function based on configuration of the one or more parameter inputs.

8. The non-transitory computer-readable medium of claim 1 , wherein the respective instantiations of the cell utilize different amounts of communications resources when performing the first function based on configuration of the one or more parameter inputs.

9. The non-transitory computer-readable medium of claim 1 , wherein a first instance of the cell is deployed using a portion of hardware resources assigned to a larger cell in which the first instance of the cell is nested.

10. The non-transitory computer-readable medium of claim 1 , wherein the one or more parameter inputs are configurable during execution of the software code to dynamically adjust the set of hardware resources on which at least one instance of the cell is deployed.

11. A method for configuring a multiprocessor array (MPA), wherein the MPA comprises hardware resources including a plurality of processors and a plurality of memories, the method comprising:
accessing a library of software code in a memory medium, wherein the software code includes a cell definition that includes first program instructions executable to perform a first function, wherein the cell definition comprises one or more language constructs which specify properties of a set of hardware resources for deployment of the cell;
receiving user input creating multiple instances of the first program instructions specified by the cell definition for use in one or more applications, wherein the user input includes input to the one or more language constructs specifying different amounts of hardware resources for respective ones of the multiple instances; and
wherein the multiple instances of the cell are deployable such that amounts of hardware resources in respective hardware portions on which the respective instances are deployed are different based on the user input to the one or more language constructs.

12. The method of claim 11 , further comprising:
deploying the multiple instances of the cell on one or more MPAs.

13. The method of claim 11 , where respective first and second instantiations of the cell are deployable on at least one MPA within the same software application.

14. The method of claim 11 , wherein the respective instances of the cell utilizes different numbers of processors of the MPA based on configuration of the one or more language constructs.

15. The method of claim 11 , wherein the one or more language constructs are further user configurable to specify one or more communication ports, wherein the one or more communication ports are user configurable to specify communication with other software code in a software application;
wherein instances of the cell comprise respective configurations of the one or more communication ports specifying connectivity of the one or more communication ports with other software code deployed on the MPA.

16. A system, comprising:
one or more processors; and
one or more memories having program instructions stored thereon that are executable by the one or more processors to cause operations comprising:
deploying software code on a multiprocessor array (MPA), wherein the software code comprises:
a cell definition that includes:
first program instructions executable to perform a first function; and
one or more first language constructs which are user configurable to specify one or more parameter inputs;
wherein the one or more parameter inputs are user configurable to specify properties of a set of hardware resources usable to execute the software code, wherein the hardware resources include a plurality of processors and a plurality of memories; and

wherein multiple instances of the first program instructions specified by the cell definition are deployable, based on user input selecting the cell and specifying one or more different parameter inputs for ones of the instances, in different hardware portions of at least one MPA to perform the first function in one or more software applications; and
wherein amounts of hardware resources in the respective hardware portion on which one or more respective instances of the cell are deployed are different and are based on the user-specified one or more parameter inputs.

17. The system of claim 16 , further comprising: the MPA.

18. The system of claim 16 , wherein the one or more parameter inputs further modify an operation of the first function.

19. The system of claim 16 , wherein the respective instantiations of the cell utilize different amounts of memory to store temporary state when performing the first function based on configuration of the one or more parameter inputs.

20. The system of claim 16 , wherein the respective instantiations of the cell utilize different amounts of communications resources when performing the first function based on configuration of t

Assignees

• Coherent Logix Inc

Inventors

• Lim Stephen E
• Ngo Viet N
• Nicholson Jeffrey M
• Beardslee John Mark
• Wang Teng-I
• Shang Zhong Qing
• Purnell Michael Lyle

Classifications

• G06F8/60

  Software deployment · CPC title

• G06F8/443

  Optimisation · CPC title

• G06F8/71 Primary

  Version control (security arrangements therefor G06F21/57); Configuration management · CPC title

• G06F9/44505 Primary

  Configuring for program initiating, e.g. using registry, configuration files · CPC title