What is CPC H10P14/29?

CPC H10P14/29 is the Cooperative Patent Classification code for “characterised by the substrates.”

How many patents are filed under CPC H10P14/29 (characterised by the substrates)?

Our database includes 332 publications tagged with this CPC code.

Is patent activity under CPC H10P14/29 growing?

Publication counts under this code: 57 in 2024 vs 80 in 2025 (latest complete years).

{characterised by the substrates}

Related technology areas

Mapped technology topics for this CPC code.

Electricity

CPC classification statistics
Metric	Value
CPC code	H10P14/29
Official title	{characterised by the substrates}
Display label	characterised by the substrates
Total patents	332

Filing trend

Year-over-year patent counts classified under this CPC code.

Filing activity over the last five years is rapidly growing.

Patents filed per year
Year	Patents
2015	23
2016	22
2017	24
2018	21
2019	24
2020	27
2021	16
2022	15
2023	8
2024	57
2025	80
2026	15

Representative patents

Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.

Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry
US-2017372943-A1 · Dec 28, 2017 · US
Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry
US-2017372942-A1 · Dec 28, 2017 · US
Methods Of Forming One Or More Covered Voids In A Semiconductor Substrate
US-2017372940-A1 · Dec 28, 2017 · US
Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry
US-2017352580-A1 · Dec 7, 2017 · US
Methods of Forming One or More Covered Voids in a Semiconductor Substrate, Methods of Forming Field Effect Transistors, Methods of Forming Semiconductor-on-Insulator Substrates, Methods of Forming a Span Comprising Silicon Dioxide, Methods of Cooling Semiconductor Devices, Methods of Forming Electromagnetic Radiation Emitters and Conduits, Methods of Forming Imager Systems, Methods of Forming Nanofluidic Channels, Fluorimetry Methods, and Integrated Circuitry
US-2017352579-A1 · Dec 7, 2017 · US
Utilization of angled trench for effective aspect ratio trapping of defects in strain-relaxed heteroepitaxy of semiconductor films
US-9799531-B2 · Oct 24, 2017 · US
Methods of forming one or more covered voids in a semiconductor substrate
US-9786548-B2 · Oct 10, 2017 · US
Base material on which single-crystal diamond is grown comprised of a base substrate, bonded single-crystal MgO layer, and heteroepitaxial film, and method for manufacturing a single-crystal diamond substrate on the base material
US-9752255-B2 · Sep 5, 2017 · US
Semiconductor device
US-9590075-B2 · Mar 7, 2017 · US
Monolithic manifold mask and substrate concepts
US-2017057028-A1 · Mar 2, 2017 · US
Elimination of defects in long aspect ratio trapping trench structures
US-9570297-B1 · Feb 14, 2017 · US
Group III nitride integration with CMOS technology
US-9564526-B2 · Feb 7, 2017 · US
Sense amplifier layout for finfet technology
US-2017032827-A1 · Feb 2, 2017 · US
Method for manufacturing semiconductor device
US-2017012108-A1 · Jan 12, 2017 · US
Amorphous silicon crystallizing method, crystallized silicon film forming method, semiconductor device manufacturing method and film forming apparatus
US-9540743-B2 · Jan 10, 2017 · US
Method of forming fin-shaped structure
US-2016358827-A1 · Dec 8, 2016 · US
Elimination of defects in long aspect ratio trapping trench structures
US-9502245-B1 · Nov 22, 2016 · US
Semiconductor devices and methods for manufacturing the same
US-9496149-B2 · Nov 15, 2016 · US
Epitaxy substrate, method for producing an epitaxy substrate and optoelectronic semiconductor chip comprising an epitaxy substrate
US-9484490-B2 · Nov 1, 2016 · US
Method for depositing a group III nitride semiconductor film
US-9478420-B2 · Oct 25, 2016 · US

Frequently asked questions

Answers are generated from the same data shown on this page.

What is CPC H10P14/29?: CPC H10P14/29 is the Cooperative Patent Classification code for “characterised by the substrates.”
How many patents are filed under CPC H10P14/29 (characterised by the substrates)?: Our database includes 332 publications tagged with this CPC code.
Is patent activity under CPC H10P14/29 growing?: Publication counts under this code: 57 in 2024 vs 80 in 2025 (latest complete years).