Semiconductor devices and methods for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9496149-B2
Application number	US-201414251830-A
Country	US
Kind code	B2
Filing date	Apr 14, 2014
Priority date	Apr 14, 2014
Publication date	Nov 15, 2016
Grant date	Nov 15, 2016

Abstract

Semiconductor devices and methods for manufacturing the same are disclosed. In an embodiment, a method of manufacturing a semiconductor device may include providing a substrate having a recess; epitaxially forming a first layer including a doped semiconductor material within the recess; and epitaxially forming a second layer including an undoped semiconductor material over at least a portion of the recess.

First claim

What is claimed is:

1. A method of manufacturing a semiconductor device, the method comprising:
providing a substrate having a recess;
epitaxially forming a first layer comprising a doped semiconductor material within the recess, the doped semiconductor material comprising silicon;
epitaxially forming a second layer comprising an undoped semiconductor material over at least a portion of the recess; and
etching the second layer to substantially consume or otherwise remove the second layer.

2. The method of claim 1 , wherein a thickness of the second layer is in a range from about 1 nanometer to about 6 nanometers.

3. The method of claim 1 , wherein the undoped semiconductor material of the second layer comprises undoped silicon.

4. The method of claim 1 , further comprising:
forming a mask layer over the second layer and a portion of the substrate; and
removing a portion of the mask layer disposed over the second layer.

5. The method of claim 4 , wherein removing the portion of the mask layer comprises a wet etch process.

6. The method of claim 1 , wherein the second layer further comprises a doped semiconductor material, wherein the undoped semiconductor material of the second layer is distal a top surface of the substrate and the doped semiconductor material of the second layer is proximal the top surface of the substrate.

7. The method of claim 6 , wherein the doped semiconductor material of the second layer has a graded doping profile, wherein a dopant concentration is higher proximal the top surface of the substrate, and wherein the dopant concentration is lower distal the top surface of the substrate.

8. The method of claim 1 , further comprising:
epitaxially forming a third layer comprising a semiconductor material over a surface of the first layer, wherein epitaxially forming the second layer comprises epitaxially forming the second layer over the first layer and the third layer.

9. The method of claim 8 , wherein a top surface of the third layer is disposed above a top surface of the substrate.

10. The method of claim 8 , wherein a top surface of the third layer is at least substantially flush with a top surface of the substrate.

11. The method of claim 8 , wherein a thickness of the third layer is in a range from about 1 nanometer to about 5 nanometers.

12. The method of claim 8 , wherein the semiconductor material of the third layer comprises at least one material selected from a group of materials, the group consisting of SiC and SiCP.

13. A method of manufacturing a semiconductor device, the method comprising:
providing a substrate having a recess;
epitaxially forming a first layer comprising a doped silicon containing material within the recess;
epitaxially forming a second layer comprising an undoped semiconductor material over at least a portion of the recess;
forming a mask layer over the second layer and a portion of the substrate;
etching a portion of the mask layer disposed over the second layer;
etching the second layer to substantially consume or otherwise remove the second layer, wherein a contact resistance penalty for subsequent electrical contact to the first layer is reduced; and
forming an electrical contact over the first layer.

14. The method of claim 13 , wherein the mask layer comprises a nitride material.

15. The method of claim 13 , wherein the undoped semiconductor material of the second layer comprises undoped silicon.

16. The method of claim 13 , further comprising:
epitaxially forming a third layer comprising a semiconductor material over a surface of the first layer, wherein epitaxially forming the second layer comprises epitaxially forming the second layer over the first layer and the third layer.

17. A method of manufacturing a semiconductor device, the method comprising:
etching a recess in a top surface of a first region of a substrate;
forming a first layer in the recess using a first epitaxial process, the first layer comprising a doped semiconductor material and having a topmost surface with a first lateral width;
forming a second layer over a portion of the first layer using a second epitaxial process, the second layer comprising an undoped semiconductor material, and the second layer having a thickness in a range from about 1 nanometer to about 6 nanometers, the second layer having a bottommost surface having a second lateral width, the second lateral width being less than the first lateral width;
etching the second layer to remove the second layer and produce an exposed portion of the first layer; and
forming an electrical contact in contact with the exposed portion of the first layer.

18. The method of claim 17 , wherein the second layer further comprises a doped semiconductor material, the doped semiconductor material of the second layer being proximal the top surface of the substrate and the undoped semiconductor material of the second layer being distal the top surface of the substrate.

19. The method of claim 17 , wherein exposing the portion of the first layer comprises:
forming a mask layer over the first region of the substrate;
removing a portion of the mask layer to expose at least a portion of the second layer; and
etching the exposed portion of the second layer.

20. The method of claim 17 , wherein the first epitaxial process comprises a first vapor phase epitaxial process, and wherein the second epitaxial process comprises at least one of a cyclic deposition etch process and a selective epitaxial growth process.

21. The method of claim 1 , wherein etching the second layer entirely removes the second layer leaving the first layer unperturbed.

22. The method of claim 1 , wherein the second layer is formed on at least a portion of the first layer.

23. The method of claim 1 , further comprising, after etching the second layer to substantially consume the second layer, forming an electrical contact on a residual portion of the second layer.

24. The method of claim 1 , further comprising, after etching the second layer to remove the second layer, forming an electrical contact on the first layer.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Tsai Chun Hsiung
• Kwok Tsz-Mei

Classifications

• H10P14/27

  using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials · CPC title

• H10P14/3438

  Doping during depositing · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10P14/3251

  consisting of three or more layers · CPC title

• H10P14/3211

  Silicon, silicon germanium or germanium · CPC title