Memory devices with different conductive types and methods for manufacturing the same
US-2026089938-A1 · Mar 26, 2026 · US
having the source region and the drain region on the same level, e.g. lateral transistors
having the source region and the drain region on the same level, e.g. lateral transistors · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10B20/30 |
| Official title | {having the source region and the drain region on the same level, e.g. lateral transistors} |
| Display label | having the source region and the drain region on the same level, e.g. lateral transistors |
| Total patents | 33 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is rapidly growing.
| Year | Patents |
|---|---|
| 2015 | 2 |
| 2016 | 1 |
| 2017 | 1 |
| 2018 | 2 |
| 2019 | 3 |
| 2020 | 4 |
| 2021 | 1 |
| 2022 | 5 |
| 2023 | 5 |
| 2024 | 5 |
| 2025 | 3 |
| 2026 | 1 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Memory device including isolation transistor
US-2025393257-A1 · Dec 25, 2025 · US
Semiconductor memory devices with different doping types
US-2025169142-A1 · May 22, 2025 · US
Semiconductor memory devices with different doping types
US-12230681-B2 · Feb 18, 2025 · US
Display device and electronic device
US-2024429322-A1 · Dec 26, 2024 · US
Display device and electronic device
US-12119410-B2 · Oct 15, 2024 · US
Semiconductor device and method of manufacturing the same
US-2024306382-A1 · Sep 12, 2024 · US
Integrated circuit read only memory (ROM) structure
US-11963348-B2 · Apr 16, 2024 · US
Semiconductor memory devices with different doping types
US-2024090210-A1 · Mar 14, 2024 · US
Semiconductor memory devices with different doping types
US-11856761-B2 · Dec 26, 2023 · US
Mechanical interconnect memory
US-2023253061-A1 · Aug 10, 2023 · US
Integrated circuit read only memory (ROM) structure
US-11723194-B2 · Aug 8, 2023 · US
Method for converting a floating gate non-volatile memory cell to a read-only memory cell and circuit structure thereof
US-11665915-B2 · May 30, 2023 · US
OTP memory and method for making the same
US-11545498-B2 · Jan 3, 2023 · US
Integrated circuit read only memory (rom) structure
US-2022384462-A1 · Dec 1, 2022 · US
Semiconductor memory devices with different doping types
US-2022359546-A1 · Nov 10, 2022 · US
Semiconductor devices with memory cells
US-11462552-B2 · Oct 4, 2022 · US
Integrated circuit read only memory (rom) structure
US-2022285375-A1 · Sep 8, 2022 · US
Semiconductor devices with memory cells
US-2022223609-A1 · Jul 14, 2022 · US
Epitaxial structures of a semiconductor device having a wide gate pitch
US-10971625-B2 · Apr 6, 2021 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10B20/30?
- CPC H10B20/30 is the Cooperative Patent Classification code for “having the source region and the drain region on the same level, e.g. lateral transistors.”
- How many patents are filed under CPC H10B20/30 (having the source region and the drain region on the same level, e.g. lateral transistors)?
- Our database includes 33 publications tagged with this CPC code.
- Is patent activity under CPC H10B20/30 growing?
- Publication counts under this code: 5 in 2024 vs 3 in 2025 (latest complete years).