Digital-to-analog converter circuitry
US-12512851-B2 · Dec 30, 2025 · US
characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H03M3/324 |
| Official title | {characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement} |
| Display label | characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement |
| Total patents | 33 |
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2015 | 4 |
| 2016 | 3 |
| 2017 | 3 |
| 2018 | 1 |
| 2019 | 3 |
| 2020 | 5 |
| 2021 | 4 |
| 2022 | 2 |
| 2023 | 2 |
| 2024 | 2 |
| 2025 | 4 |
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
US-12512851-B2 · Dec 30, 2025 · US
US-2025183910-A1 · Jun 5, 2025 · US
US-2025158635-A1 · May 15, 2025 · US
US-2025030436-A1 · Jan 23, 2025 · US
US-12126363-B2 · Oct 22, 2024 · US
US-2024039554-A1 · Feb 1, 2024 · US
US-11716092-B2 · Aug 1, 2023 · US
US-11581899-B2 · Feb 14, 2023 · US
US-11515859-B2 · Nov 29, 2022 · US
US-2022069832-A1 · Mar 3, 2022 · US
US-2021399737-A1 · Dec 23, 2021 · US
US-2021344328-A1 · Nov 4, 2021 · US
US-11095271-B2 · Aug 17, 2021 · US
US-10965297-B1 · Mar 30, 2021 · US
US-10866146-B2 · Dec 15, 2020 · US
US-10855306-B2 · Dec 1, 2020 · US
US-10833697-B2 · Nov 10, 2020 · US
US-2020083900-A1 · Mar 12, 2020 · US
US-2020076446-A1 · Mar 5, 2020 · US
US-2019379357-A1 · Dec 12, 2019 · US
Answers are generated from the same data shown on this page.