Optimizable analog-to-digital converter for unipolar or bipolar pulse signals based on multi-bit sigma-delta modulation

US11716092B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-11716092-B2
Application numberUS-202117467229-A
CountryUS
Kind codeB2
Filing dateSep 5, 2021
Priority dateOct 25, 2017
Publication dateAug 1, 2023
Grant dateAug 1, 2023

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A delta sigma modulator includes a summation circuit, at least one integrator, a multi-bit quantizer and a negative feedback circuit. The summation circuit is configured to produce a difference signal between a unipolar or bipolar analog input signal and an analog feedback signal. The integrator is operatively coupled to the summation circuit to integrate the difference signal. The multi-bit quantizer is operatively coupled to the integrator to digitize the integrated signal to generate an N-bit digital output signal, N being an integer greater than 1. The negative feedback circuit operatively couples the multi-bit quantizer to the summation circuit. The negative feedback circuit includes a digital-to-analog converter arrangement for receiving the N-bit digital output signal and providing the analog feedback signal such that digital values of the N-bit digital output signal and values of the analog feedback encoded by the digital values have a non-linear relationship to one another.

First claim

Opening claim text (preview).

The invention claimed is: 1. A delta sigma modulator comprising: a summation circuit configured to produce a difference signal between a unipolar or bipolar analog input signal and an analog feedback signal; at least one integrator operatively coupled to the summation circuit to integrate the difference signal; a multi-bit quantizer operatively coupled to the at least one integrator to digitize the integrated signal to generate an N-bit digital output signal, N being an integer greater than 1; and a negative feedback circuit operatively coupling the multi-bit quantizer to the summation circuit, the negative feedback circuit including a digital-to-analog converter arrangement for receiving the N-bit digital output signal and providing the analog feedback signal such that digital values of the N-bit digital output signal and values of the analog feedback encoded by the digital values have a non-linear relationship to one another, wherein the non-linear relationship between the digital values of the N-bit digital output signal and the values of the analog feedback signal encoded by the digital values is tailored to characteristics of the analog input signal to thereby produce an accurate representation of the analog input signal. 2. The delta sigma modulator of claim 1 wherein the analog input signal is a bipolar analog signal and the digital-to-analog converter arrangement includes a bipolar digital-to-analog converter arrangement. 3. The delta sigma modulator of claim 2 wherein the multi-bit quantizer includes a plurality of comparators and the digital-to-analog converter arrangement includes a plurality of bipolar digital-to-analog converters, the plurality of comparators including twice as many comparators as bipolar digital-to-analog converters included in the plurality of bipolar digital-to-analog converters. 4. The delta sigma modulator of claim 3 wherein the negative feedback circuit provides the analog feedback signal such that each polarity of the bipolar analog signal having a common magnitude has an N-bit digital output signal with a common magnitude. 5. The delta sigma modulator of claim 1 wherein the analog input signal is a bipolar signal and the digital-to-analog converter arrangement includes a plurality of unipolar digital-to-analog converters. 6. The delta sigma modulator of claim 1 , wherein the non-linear relationship between the digital values of the N-bit digital output signal and between the values of the analog feedback signal encoded by the digital values is adjustable. 7. The delta sigma modulator of claim 1 , wherein the non-linear relationship between the digital values of the N-bit digital output signal and between the values of the analog feedback signal encoded by the digital values is programmable. 8. The delta sigma modulator of claim 1 , wherein the non-linear relationship between the digital values of the N-bit digital output signal and between the values of the analog feedback signal encoded by the digital values is fixed. 9. The delta sigma modulator of claim 1 , wherein the multi-bit quantizer includes a comparator arrangement configured to compare the integrated signal to at least three thresholds and generate an N-bit digital output signal that reflects which of the at least three thresholds were exceeded, a difference between at least two pairs of successive thresholds being unequal to one another. 10. The delta sigma modulator of claim 1 , wherein the non-linear relationship between the digital values of the N-bit digital output signal and the values of the analog feedback signal encoded by the digital values is tailored to characteristics of a detector that generates the analog input signal to thereby produce an accurate representation of the analog input signal. 11. The delta sigma modulator of claim 1 , wherein the non-linear relationship between the digital values of the N-bit digital output signal and the values of the analog feedback signal encoded by the digital values is tailored based on application specific characteristics to thereby produce an accurate representation of the analog input signal. 12. A method for digitizing a unipolar or bipolar analog input signal, comprising: directing the unipolar or bipolar analog input signal to an input of a multi-bit delta sigma modulator that generates an N-bit digital output signal, N being an integer greater than 1, wherein digital values of the N-bit digital output signal and values of the analog feedback encoded by the digital values have a non-linear relationship to one another; and adjusting the nonlinear relationship between the digital values of the N-bit digital output signal and the values of the analog feedback encoded by the digital values, wherein the adjusting is performed based at least in part on characteristics of a detector that generates the analog input signal. 13. The method of claim 12 , wherein the adjusting is performed based at least in part on characteristics of the analog input signal. 14. The method of claim 12 , wherein the adjusting is performed based at least in part on application specific characteristics. 15. A delta sigma modulator comprising: a summation circuit configured to produce a difference signal between a unipolar or bipolar analog input signal and an analog feedback signal; at least one integrator operatively coupled to the summation circuit to integrate the difference signal; a multi-bit quantizer operatively coupled to the at least one integrator to digitize the integrated signal to generate an N-bit digital output signal, N being an integer greater than 1; and a negative feedback circuit operatively coupling the multi-bit quantizer to the summation circuit, the negative feedback circuit including a plurality of digital-to-analog converters that are separately addressable by the N-bit digital output signal received from the multi-bit quantizer, wherein each DAC has a different scaling factor between a received value of the N-bit digital output signal and a corresponding output signal, wherein the negative feedback circuit includes 2 N -1 bipolar digital-to-analog converters or 2(2 N -1) unipolar digital-to-analog converters.

Assignees

Inventors

Classifications

  • H03M3/324Primary

    characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement · CPC title

  • H03M1/664Primary

    Non-linear conversion not otherwise provided for in subgroups of H03M1/66 · CPC title

  • Non-linear conversion systems · CPC title

  • Details of the digital/analogue conversion in the feedback path · CPC title

  • with lower resolution, e.g. single bit, feedback · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11716092B2 cover?
A delta sigma modulator includes a summation circuit, at least one integrator, a multi-bit quantizer and a negative feedback circuit. The summation circuit is configured to produce a difference signal between a unipolar or bipolar analog input signal and an analog feedback signal. The integrator is operatively coupled to the summation circuit to integrate the difference signal. The multi-bit qu…
Who is the assignee on this patent?
Univ Arizona
What technology area does this patent fall under?
Primary CPC classification H03M3/324. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 11 related publications on this page (citations in our corpus or others sharing the same primary CPC).