Methods and apparatus to boot from block devices
US-2023333858-A1 · Oct 19, 2023 · US
with priority control
with priority control · Cooperative Patent Classification (CPC)
Computing, optics, measurement, and control technologies.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | G06F13/34 |
| Official title | with priority control |
| Display label | with priority control |
| Total patents | 65 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2015 | 17 |
| 2016 | 9 |
| 2017 | 10 |
| 2018 | 10 |
| 2019 | 5 |
| 2020 | 3 |
| 2021 | 2 |
| 2022 | 2 |
| 2023 | 4 |
| 2024 | 3 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Scalable round-robin arbiter tree for round-robin arbitration
US-11762795-B2 · Sep 19, 2023 · US
Scalable high-speed round-robin arbiter tree
US-2022365894-A1 · Nov 17, 2022 · US
Delivering interrupts to user-level applications
US-2022138133-A1 · May 5, 2022 · US
Memory access system, method for controlling the same, computer-readable storage medium, and image forming apparatus
US-11163711-B2 · Nov 2, 2021 · US
Delivering interrupts to user-level applications
US-11113217-B2 · Sep 7, 2021 · US
Delivering interrupts to user-level applications
US-2020264997-A1 · Aug 20, 2020 · US
Delivering interrupts to user-level applications
US-10572415-B2 · Feb 25, 2020 · US
Application processor and integrated circuit including interrupt controller
US-10558597-B2 · Feb 11, 2020 · US
Updating virtual machine memory by interrupt handler
US-10346330-B2 · Jul 9, 2019 · US
Memory and method for operating a memory with interruptible command sequence
US-10289596-B2 · May 14, 2019 · US
Virtual machine monitor interrupt support for computer processing unit (CPU)
US-10248595-B2 · Apr 2, 2019 · US
Network interface card rate limiting
US-10212129-B2 · Feb 19, 2019 · US
Virtual Machine Monitor Interrupt Support for Computer Processing Unit (CPU)
US-2019050356-A1 · Feb 14, 2019 · US
System arbiter with programmable priority levels
US-10114776-B2 · Oct 30, 2018 · US
Delivering interrupts to user-level applications
US-2018246827-A1 · Aug 30, 2018 · US
Systems and methods for coalescing interrupts
US-10055369-B1 · Aug 21, 2018 · US
Memory access system, method for controlling the same, computer-readable storage medium, and image forming apparatus
US-2018210849-A1 · Jul 26, 2018 · US
Application processor and integrated circuit including interrupt controller
US-2018203812-A1 · Jul 19, 2018 · US
Interrupt-controlled direct memory access peripheral data transfer
US-10002089-B2 · Jun 19, 2018 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC G06F13/34?
- CPC G06F13/34 is the Cooperative Patent Classification code for “with priority control.”
- How many patents are filed under CPC G06F13/34 (with priority control)?
- Our database includes 65 publications tagged with this CPC code.
- Is patent activity under CPC G06F13/34 growing?
- Publication counts under this code: 4 in 2023 vs 3 in 2024 (latest complete years).