Semiconductor device and circuit with dynamic control of electric field

US9515644B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9515644-B2
Application numberUS-201414286418-A
CountryUS
Kind codeB2
Filing dateMay 23, 2014
Priority dateMay 23, 2013
Publication dateDec 6, 2016
Grant dateDec 6, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit, comprising: a semiconductor device with one or more field gate terminals configured to control an electric field in a drift region of the semiconductor device, wherein the semiconductor device comprises a bipolar transistor having base, collector, and emitter terminals; and a feedback circuit configured to dynamically control one or more bias voltages applied to the one or more field gate terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at the collector terminal. 2. The circuit as defined in claim 1 , wherein the one or more field gate terminals are configured to dynamically control the electric field in a collector region. 3. The circuit as defined in claim 1 , wherein the time-varying signal used by the feedback circuit to control the one or more bias voltages comprises a collector-emitter voltage. 4. The circuit as claimed in claim 1 , wherein the feedback circuit comprises an inverter connected between an output of the semiconductor device and the field gate terminal. 5. The circuit as defined in claim 1 , wherein the feedback circuit is configured to determine the one or more bias voltages based on a time varying load mismatch signal. 6. The circuit as claimed in claim 1 , wherein the real-time control is dynamically applied at a frequency of operation of the semiconductor device. 7. The circuit of claim 1 , wherein the emitter terminal is located in a substrate of the semiconductor device. 8. The circuit of claim 1 , wherein the emitter terminal is located in a layer above a substrate of the semiconductor device. 9. The circuit of claim 1 , wherein the one or more field gate terminals are configured to dynamically suppress a peak electric field in the collector terminal. 10. The circuit of claim 1 , wherein the one or more field gate terminals are configured to control a breakdown voltage of the bipolar transistor. 11. The circuit of claim 1 , wherein the one or more field gate terminals are configured to control a cut-off frequency of the bipolar transistor. 12. The circuit of claim 1 , wherein the bipolar transistor further comprises a substrate contact. 13. The circuit of claim 1 , further comprising: a choke inductor coupled between a power supply and the bipolar transistor. 14. The circuit of claim 1 , wherein the time-varying signal used by the feedback circuit to control the one or more bias voltages comprises a base-collector voltage. 15. A radio frequency (RF) power amplifier comprising the circuit as claimed in claim 1 . 16. An electronic device including the circuit of claim 1 . 17. A method of controlling a semiconductor device comprising one or more field gate terminals for controlling an electric field in a drift region of the semiconductor device, wherein the method comprises: dynamically controlling a bias voltage applied to the one or more field gate terminals to achieve different transistor characteristics in real-time in response to a time-varying signal at a collector terminal by a feedback circuit, wherein the semiconductor device comprises a bipolar transistor having base, collector, and emitter terminals. 18. The method as claimed in claim 17 , further comprising: dynamically controlling the bias voltage applied to the field gate terminal in dependence on a collector-emitter voltage of the bipolar transistor.

Assignees

Inventors

Classifications

  • H03K17/10Primary

    Modifications for increasing the maximum permissible switched voltage · CPC title

  • with semiconductor devices only · CPC title

  • as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic · CPC title

  • with semiconductor devices only {(H03F3/245 takes precedence)} · CPC title

  • Feedback used to stabilise the amplifier · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9515644B2 cover?
A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-tim…
Who is the assignee on this patent?
Nxp Bv
What technology area does this patent fall under?
Primary CPC classification H03K17/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).