Electrical Testing for Panel Characterization and Defect Screening
US-2024402237-A1 · Dec 5, 2024 · US
US2022013416A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2022013416-A1 |
| Application number | US-202016924847-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jul 9, 2020 |
| Priority date | Jul 9, 2020 |
| Publication date | Jan 13, 2022 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A method includes having a first wafer bonding recipe and a model of a wafer bonding process, the model comprising an input indicative of a physical parameter of a first wafer to be bonded to a second wafer and configured to output a wafer bonding recipe based on the physical parameter of the first wafer; obtaining measurements of the first wafer to obtain the physical parameter of the first wafer; generating, by the model, the first wafer bonding recipe based on the physical parameter of the first wafer; and bonding the first wafer to the second wafer in accordance with the first wafer bonding recipe to produce a first post-bond wafer.
Opening claim text (preview).
1 . A method comprising: having a first wafer bonding recipe and a model of a wafer bonding process, the model comprising an input indicative of a physical parameter of a first wafer to be bonded to a second wafer and configured to output a wafer bonding recipe based, at least in part, on the physical parameter of the first wafer, the physical parameter of the first wafer representing information relating to topographical features of the first wafer; obtaining measurements of the first wafer to obtain the physical parameter of the first wafer; generating, by the model, the first wafer bonding recipe based, at least in part, on the physical parameter of the first wafer; and bonding the first wafer to the second wafer in accordance with the first wafer bonding recipe to produce a first post-bond wafer. 2 . The method of claim 1 , further comprising annealing the first post-bond wafer to produce a fusion bonded wafer. 3 . The method of claim 1 , wherein the physical parameter of the first wafer comprises out-of-plane distortions of the first wafer. 4 . The method of claim 1 , further comprising deriving the model of the wafer bonding process comprising: obtaining measurements of a third wafer and a fourth wafer to obtain a physical parameter of the third wafer and a physical parameter of the fourth wafer; simulating wafer bonding of the third wafer and the fourth wafer in accordance with process conditions to estimate a physical parameter of a simulated post-bond wafer; and creating the model of the wafer bonding process in accordance with the physical parameter of the third wafer, the physical parameter of the fourth wafer, the process conditions, and the estimated physical parameter of the simulated post-bond wafer. 5 . The method of claim 4 , wherein creating the model of the wafer bonding process comprises: comparing the physical parameter of the third wafer, the physical parameter of the fourth wafer, the process conditions, and the estimated physical parameter of the simulated post-bond wafer; and determining the model of the wafer bonding process in accordance with the comparison. 6 . The method of claim 5 , wherein generating the first wafer bonding recipe comprises: estimating, by the model, post-bond distortions of the first post-bond wafer in accordance with the physical parameter of the first wafer; tuning process conditions of the first wafer bonding recipe to optimize the estimated post-bond distortions of the first post-bond wafer; and generating the first wafer bonding recipe in accordance with the tuned process conditions. 7 . The method of claim 1 , further comprising obtaining measurements of the second wafer to obtain a physical parameter of the second wafer, wherein the first wafer bonding recipe is further generated based on the physical parameter of the second wafer. 8 . The method of claim 1 , further comprising bonding a third wafer to a fourth wafer in accordance with the first wafer bonding recipe to produce a second post-bond wafer. 9 . The method of claim 8 , wherein the first wafer and the third wafer are part of a first wafer lot, and the second wafer and the fourth wafer are part of a second wafer lot, and wherein the first wafer lot and the second wafer lot are processed together in a semiconductor fabrication process flow. 10 . A method comprising: having a model of a wafer bonding process, the model comprising an input indicative of a physical parameter of a first post-bond wafer and configured to output a wafer bonding recipe based on the physical parameter of the first post-bond wafer; bonding a first wafer to a second wafer in accordance with a wafer bonding recipe, to form the first post-bond wafer; obtaining measurements of the first post-bond wafer to obtain the physical parameter of the first post-bond wafer; generating, by the model, the first wafer bonding recipe in accordance with the physical parameter of the first post-bond wafer; and bonding a third wafer to a fourth wafer in accordance with the first wafer bonding recipe, to form a second post-bond wafer. 11 . The method of claim 10 , further comprising annealing the first post-bond wafer to produce a first fusion bonded wafer; and annealing the second post-bond wafer to produce a second fusion bonded wafer. 12 . The method of claim 10 , wherein obtaining measurements comprises scanning the first post-bond wafer to obtain the physical parameter of the first post-bond wafer. 13 . The method of claim 10 , further comprising: obtaining measurements of the second post-bond wafer to obtain a physical parameter of the second post-bond wafer; generating, by the model, a second wafer bonding recipe in accordance with the physical parameter of the second post-bond wafer; and bonding a fifth wafer to a sixth wafer in accordance with the second wafer bonding recipe to form a third post-bond wafer. 14 . A processing system comprising: a non-transitory computer-readable storage medium comprising instructions that when executed cause a processor of a computing device to perform operations in coordination with a semiconductor wafer fabrication process, the instructions comprising: having a first wafer bonding recipe and a model of a wafer bonding process, the model comprising an input indicative of a physical parameter of a first wafer to be bonded to a second wafer and configured to output a wafer bonding recipe based on the physical parameter of the first wafer, the physical parameter of the first wafer representing information relating to topographical features of the first wafer; obtaining measurements of the first wafer to obtain the physical parameter of the first wafer; generating, by the model, the first wafer bonding recipe based on the physical parameter of the first wafer; and bonding the first wafer to the second wafer in accordance with the first wafer bonding recipe to produce a first post-bond wafer. 15 . The processing system of claim 14 , further comprising: a process chamber; a substrate holder in the process chamber, the substrate holder configured to mechanically support the second wafer when the first wafer is bonded to the second wafer; and a batch system to hold a plurality of wafers outside the process chamber. 16 . The processing system of claim 14 , wherein the instructions further comprise deriving the model of the wafer bonding process comprising: obtaining measurements of third wafer and fourth wafer to obtain a physical parameter of the third wafer and a physical parameter of the fourth wafer; simulating wafer bonding of the third wafer and the fourth wafer in accordance with process conditions to estimate a physical parameter of a simulated post-bond wafer; and creating the model of the wafer bonding process in accordance with the physical parameter of the third wafer, the physical parameter of the fourth wafer, the process conditions, and the estimated physical parameter of the simulated post-bond wafer. 17 . The processing system of claim 16 , wherein creating the model of the wafer bonding process comprises: comparing the physical parameter of the third wafer, the physical parameter of the fourth wafer, the process conditions, and the estimated physical parameter of the simulated post-bond wafer; and determining the model of the wafer bonding process in accordance with the comparison. 18 . The processing system of claim 17 , wherein generating the first wafer bonding recipe comprises: estimating, by the model, post-bond distortions of the first post-bond wafer in accordance wi
characterised by multiple measurements, corrections, marking or sorting processes · CPC title
by direct semiconductor to semiconductor bonding · CPC title
Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps · CPC title
batch processes · CPC title
Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.