Electronic device and control method thereof

US12451083B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12451083-B2
Application numberUS-202318344020-A
CountryUS
Kind codeB2
Filing dateJun 29, 2023
Priority dateFeb 5, 2021
Publication dateOct 21, 2025
Grant dateOct 21, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An example electronic device includes a display panel configured to display a screen, a display driver IC (DDI) configured to supply a data voltage for displaying the screen to the display panel, and a processor configured to transmit image data for setting the data voltage to the DDI. The DDI is configured to generate a synchronization signal for controlling a time point at which the data voltage is supplied to the display panel, and to deliver the synchronization signal to the processor. The processor is configured to select a time point, at which the image data starts to be transmitted, within a waiting period of the synchronization signal.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic device comprising: a display configured to display a screen; a display driver IC (DDI) configured to supply a data voltage for displaying the screen to the display; and at least one processor, comprising processing circuitry, configured to transmit image data for setting the data voltage to the DDI, wherein the DDI is configured to: generate a synchronization signal for controlling a time point at which the data voltage is supplied to the display; and deliver the synchronization signal to the at least one processor, and wherein the at least one processor is configured, individually or collectively, to: select a time point, at which the image data starts to be transmitted, within a waiting period of the synchronization signal in a frame period set depending on an operating frequency of the electronic device; assign a threshold time within the waiting period; and send a command to the DDI to change the operating frequency based on whether the time point at which the image data starts to be transmitted is before or after the threshold time. 2. The electronic device of claim 1 , wherein the waiting period includes a blank period, during which buffering occurs in the DDI before a display period in which the screen is displayed within one frame is started, and a variable waiting period, during which the at least one processor starts transmitting the image data to the DDI after the display period progresses, and wherein the at least one processor is configured to: select the time point, at which the image data starts to be transmitted to the DDI, to be within the variable waiting period. 3. The electronic device of claim 1 , wherein the DDI includes a frame buffer configured to store the image data during one frame, and wherein the DDI is configured to: supply, to the display, the data voltage based on the image data stored in the frame buffer during a display period of the synchronization signal. 4. The electronic device of claim 1 , wherein the at least one processor is configured to perform a first transmission for transmitting the image data to the DDI, wherein the DDI is configured to perform a second transmission for supplying the data voltage to the display, and wherein a duration of the first transmission is shorter than a duration of the second transmission. 5. The electronic device of claim 1 , wherein the at least one processor is configured to: set an operating frequency of the DDI based on a length of the waiting period; and determine pixel characteristic values included in the image data based on the operating frequency of the DDI. 6. The electronic device of claim 1 , wherein the DDI is configured to: divide the synchronization signal into a first synchronization signal delivered to the at least one processor, and a second synchronization signal used inside the DDI; set a length of a second waiting period, which is a waiting period of the second synchronization signal, to be longer than a length of a first waiting period, which is a waiting period of the first synchronization signal; and start supplying the data voltage to the display at a time point at which the second waiting period ends, and wherein the at least one processor is configured to: select the time point, at which the image data starts to be transmitted to the DDI, within an adaptive synchronization period defined by the second waiting period. 7. The electronic device of claim 1 , wherein the at least one processor is configured to: send a first command to the DDI to decrease the operating frequency based on the time point at which the image data starts to be transmitted being a time point after the threshold time. 8. The electronic device of claim 7 , wherein the at least one processor is configured to: deliver a second command to the DDI to increase the operating frequency based on the time point at which the image data starts to be transmitted being a time point before the threshold time. 9. A method for controlling an electronic device, the method comprising: generating, by a DDI of the electronic device, a synchronization signal for controlling a time point at which a data voltage is supplied to a display panel of the electronic device; delivering, by the DDI, the synchronization signal to at least one processor of the electronic device; selecting, by the processor, a time point, at which image data starts to be transmitted to the DDI, within a waiting period of the synchronization signal in a frame period set depending on an operating frequency of the electronic device; assigning a threshold time within the waiting period; and send a command to the DDI to change the operating frequency based on whether the time point at which the image data starts to be transmitted is before or after the threshold time. 10. The method of claim 9 , wherein the waiting period includes a blank period, during which buffering occurs in the DDI before a display period in which a screen is displayed within one frame is started, and a variable waiting period, during which the processor starts transmitting the image data to the DDI after the display period progresses, and wherein the method comprises selecting the time point, at which the image data starts to be transmitted to the DDI, within the variable waiting period. 11. The method of claim 9 , wherein the DDI includes a frame buffer configured to store the image data during one frame, and wherein the method comprises supplying, to the display, the data voltage based on the image data stored in the frame buffer during a display period of the synchronization signal. 12. The method of claim 9 , comprising: performing a first transmission for transmitting the image data to the DDI, and performing a second transmission for supplying the data voltage to the display panel, wherein a duration of the first transmission is shorter than a duration of the second transmission. 13. The method of claim 9 , further comprising: setting, by the at least one processor, an operating frequency of the DDI based on a length of the waiting period; and determining, by the at least one processor, pixel characteristic values included in the image data based on the operating frequency of the DDI. 14. The method of claim 9 , further comprising: dividing, by the DDI, the synchronization signal into a first synchronization signal delivered to the at least one processor, and a second synchronization signal used inside the DDI; setting, by the DDI, a length of a second waiting period, which is a waiting period of the second synchronization signal, to be longer than a length of a first waiting period, which is a waiting period of the first synchronization signal; starting, by the DDI, supplying the data voltage to the display panel at a time point at which the second waiting period ends; and selecting the time point, at which the image data starts to be transmitted to the DDI, within an adaptive synchronization period defined by the second waiting period. 15. The method of claim 9 , further comprising: sending, by the at least one processor, a first command to the DDI to decrease the operating frequency based on the time point at which the image data starts to be transmitted being a time point after the threshold time. 16. The method of claim 15 , further comprising: sending, by the at least one processor, a second command to the DDI to increase the operating frequency based on the time point at which the image data starts to be transmitted being a time point before the threshold time.

Assignees

Inventors

Classifications

  • Use of a frame buffer in a display terminal, inclusive of the display panel · CPC title

  • Power processing, i.e. workload management for processors involved in display operations, such as CPUs or GPUs · CPC title

  • Change or adaptation of the frame rate of the video stream · CPC title

  • using an active matrix · CPC title

  • for resetting or blanking · CPC title

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Frequently asked questions

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What does patent US12451083B2 cover?
An example electronic device includes a display panel configured to display a screen, a display driver IC (DDI) configured to supply a data voltage for displaying the screen to the display panel, and a processor configured to transmit image data for setting the data voltage to the DDI. The DDI is configured to generate a synchronization signal for controlling a time point at which the data volt…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G09G3/3275. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Oct 21 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).