Display driving circuit and display device including the same

Patent metadata

Field	Value
Publication number	US-2016343355-A1
Application number	US-201615158804-A
Country	US
Kind code	A1
Filing date	May 19, 2016
Priority date	May 19, 2015
Publication date	Nov 24, 2016
Grant date	—

Abstract

An display driving circuit including a buffer write controller transmitting a different image frame to a first buffer or a second buffer, a buffer scan controller scanning an image frame stored in the first buffer or the second buffer on the basis of a predetermined cycle, a write signal detector controlling the buffer write controller such that a second image frame is transmitted to the second buffer after a first image frame is transmitted to the first buffer, and a scan buffer switching controller receiving an EOF (End of Frame) command indicating the completion of transmission of the first image frame to the first buffer and controlling the buffer scan controller such that the first image frame stored in the first buffer is scanned after the image frame previously stored in the second buffer is scanned.

First claim

1 . A display driving circuit, comprising:
a buffer write controller configured to transmit a first image frame to a first buffer and a second image frame to a second buffer; a buffer scan controller configured to scan the first image frame stored in the first buffer and the second image frame stored in the second buffer based on a cycle; a write signal detector configured to control the buffer write controller such that the second image frame is transmitted to the second buffer after the first image frame is transmitted to the first buffer; and a scan buffer switching controller configured to receive an End of Frame (EOF) command, and to control the buffer scan controller such that the first image frame is scanned after a prior second image frame stored in the second buffer is scanned, the EOF command indicating that transmission of the first image frame to the first buffer is complete.

2 . The display driving circuit according to claim 1 , wherein the write signal detector is configured to,
receive the EOF command, after the buffer write controller transmits the first image frame or the second image frame, and determine whether the buffer write controller transmits an image frame to the first buffer or the second buffer based on the EOF command.

3 . The display driving circuit according to claim 1 , wherein the write signal detector is configured to,
generate the EOF command each time the buffer write controller transmits the first image frame or the second image frame, and transmit the EOF command to the scan buffer switching controller.

4 . The display driving circuit according to claim 1 , wherein the scan buffer switching controller is configured to,
receive an EOS (End Of Scan) command indicating that the buffer scan controller has completed scanning of the first image frame, and instruct the buffer scan controller to scan a different one of the first buffer and the second buffer, when both the EOF command for the first image frame and the EOS command are received.

5 . The display driving circuit according to claim 4 , further comprising:
a timing controller configured to,
generate the EOS command, and one or more of a first periodic signal and a second periodic signal, and
activate the first periodic signal only when the EOF command is received and the EOS command is generated.

6 .- 12 . (canceled)

13 . A display driving circuit configured to process image frames, comprising:
a first buffer and a second buffer configured to store ones of the image frames; a buffer write controller configured to,
receive the image frames successively, and
alternately transmit a first one of the image frames to the first buffer and a second one of the image frames to the second buffer such that, when the second image frame includes updated information associated with only a partial area of the first image frame, the buffer write controller is configured to transmit the first image frame to the first buffer, transmit the first image frame to the second buffer again, and then transmit only the updated information associated with the partial area to the first buffer, and
a buffer scan controller alternately scanning the image frames stored in the first buffer or the second buffer.

14 . The display driving circuit according to claim 13 , wherein
the first buffer and the second buffer are configured to store different ones of the image frames in a first cycle, the first cycle being a cycle in which the first image frame is transmitted to the first buffer, and the first buffer and the second buffer are configured to store identical ones of the image frames in a second cycle, the second cycle being subsequent to the first cycle.

15 . The display driving circuit according to claim 14 , wherein the buffer write controller is configured to,
transmit an entirely of the first image frame to the first buffer within the first cycle and to the second buffer within the second cycle, and transmit at least the updated information associated the partial area of the first image frame in a third cycle subsequent to the second cycle.

16 . A display driving circuit configured to process image frames, the circuit comprising:
a driving controller configured to,
alternately transmit a first one of the image frame received from a host to a first buffer and a second image frame received from the host to a second buffer based on an End Of Frame (EOF) command, the first image frame being a different image from the second image frame and the EOF command indicating that the host has completed transmission of a respective one of the image frames, and
alternately scan the first buffer and the second buffer based on at least the EOF command such that the second buffer is scanned after the first buffer is scanned.

17 . The display driving circuit of claim 16 , wherein the driving controller is configured to generate an End of Scan (EOS) command, if the driving controller completes scanning one of the first buffer and the second buffer, the EOS command indicating that the driving controller has completed scanning the one of the first buffer and the second buffer and transmitted a respective one of the first image frame and the second image frame to a display panel.

18 . The display driving circuit of claim 17 , wherein the driving controller is further configured to generate one or more of a first periodic signal and a second periodic signal, and the first periodic signal instructing the host to transmit a next one of the image frames.

19 . The display driving circuit of claim 17 , wherein the driving controller is configured to alternately scan the first buffer and the second buffer based on the EOF command and the EOS command.

20 . The display driving circuit of claim 19 , wherein the driving controller is configured to re-scan a first one of the first buffer and the second buffer until confirmation that a second one of the first buffer and the second buffer has been updated.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Yang-Hyo
• Kim Chul-Ho
• Kim Sun-Young
• Kim Hak-Song
• Lim Sang-Hoon

Classifications

• G09G2360/18

  Use of a frame buffer in a display terminal, inclusive of the display panel · CPC title

• G09G5/003

  Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto (specific for a CRT G09G1/165; for a flat panel G09G3/2092) · CPC title

• G09G5/006

  Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04) · CPC title

• G09G5/399 Primary

  using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers · CPC title

• G09G2350/00

  Solving problems of bandwidth in display systems · CPC title