Devices and method of adjusting synchronization signal preventing tearing and flicker

Patent metadata

Field	Value
Publication number	US-9472133-B2
Application number	US-201213613942-A
Country	US
Kind code	B2
Filing date	Sep 13, 2012
Priority date	Dec 20, 2011
Publication date	Oct 18, 2016
Grant date	Oct 18, 2016

Abstract

A display controller includes a synchronization signal adjusting circuit, which adjusts at least one of the delay and the pulse width of a synchronization signal generated in a display driver and outputs an adjusted synchronization signal, and a transmission timing control circuit configured to control the transmission timing of display data, which will be transmitted to the display driver, in response to the adjusted synchronization signal.

First claim

What is claimed is:

1. A display controller comprising:
an adjusting circuit configured to receive a synchronization signal output from a display driver, configured to adjust, based on information for adjusting the synchronization signal, at least one of a delay or a pulse width of the synchronization signal, and configured to output the adjusted synchronization signal; and
a transmission timing control circuit configured to control the transmission timing of display data in response to the adjusted synchronization signal and configured to transmit transmission timing-adjusted display data to the display driver.

2. The display controller of claim 1 , wherein the synchronization signal is a signal related to transmission of the display data.

3. The display controller of claim 1 , wherein the adjusting circuit includes:
an information register configured to store the information for adjusting the synchronization signal; and
an adjusting logic circuit configured to adjust the at least one of the delay and the pulse width of the synchronization signal by using the information.

4. The display controller of claim 1 , wherein the transmission timing control circuit transmits the display data to the display driver in response to one of a rising edge and a falling edge of the adjusted synchronization signal.

5. The display controller of claim 1 , further comprising:
a transmission interface configured to prepare transmission of the display data in response to a first edge of the adjusted synchronization signal and transmit the display data to the display driver in response to a second edge of the adjusted synchronization signal, wherein the first edge is a rising edge and the second edge is a falling edge, or the first edge is a falling edge and the second edge is a rising edge.

6. The display controller of claim 5 , wherein the transmission interface is a CPU interface, a RGB interface or a serial interface.

7. The display controller of claim 5 , wherein the transmission interface is a mobile display digital interface (MDDI), a mobile industry processor interface (MIPI), a serial peripheral interface (SPI), an inter IC (I 2 C) interface, a display port (DP) or an embedded display port (eDP).

8. The display controller of claim 1 , further comprising:
a timing controller configured to generate a first control signal in response to a first edge of the adjusted synchronization signal and generate a second control signal in response to a second edge of the adjusted synchronization signal, wherein the first edge is a rising edge and the second edge is a falling edge, or the first edge is a falling edge and the second edge is a rising edge; and
a transmission interface configured to prepare transmission of the display data in response to the first control signal and transmit the display data to the display driver in response to the second control signal.

9. The display controller of claim 1 , wherein the display controller and the display driver are embodied in separated chips.

10. The display controller of claim 1 , wherein the synchronization signal is a control signal for removing tearing.

11. A display controller comprising:
an adjusting circuit configured to adjust, based on information for adjusting a synchronization signal, at least one of the delay and the pulse width of the synchronization signal generated in a display driver, and configured to output the adjusted synchronization signal; and
a transmission timing control circuit configured to control the transmission timing of display data to be transmitted to the display driver, in response to the adjusted synchronization signal,
wherein the transmission timing control circuit generates difference information corresponding to difference between a level transition timing of the adjusted synchronization signal and the controlled transmission timing, and
wherein the adjusting circuit adjusts the synchronization signal by using the difference information as the information for adjusting the synchronization signal.

12. The display controller of claim 11 , wherein the adjusting circuit includes:
a register configured to store the difference information; and
a delay adjusting circuit configured to adjust the delay of the synchronization signal by using the difference information as the information for adjusting the synchronization signal; and
a pulse width adjusting circuit configured to adjust the pulse width of the delay-adjusted synchronization signal output from the delay adjusting circuit by using the difference information as the information for adjusting the synchronization signal and to generate the adjusted synchronization signal.

13. A method for processing display data of a portable device comprising:
receiving a synchronization signal output from a display driver and which is related to transmission of display data;
adjusting, based on information for adjusting the synchronization signal, at least one of a delay or a pulse width of the synchronization signal and generating an adjusted synchronization signal;
adjusting the transmission timing of the display data in response to the adjusted synchronization signal and transmitting the transmission timing-adjusted display data to the display driver; and
processing the timing-adjusted display data and displaying processed display data on a display.

14. The method of claim 13 , wherein the information for adjusting the synchronization signal is output from a display controller, and wherein the generating the adjusted synchronization signal adjusts at least one of the delay and the pulse width by using the information output from the display controller, to adjust the transmission timing, and to generate the adjusted synchronization signal.

15. The method of claim 14 , wherein the information for adjusting the synchronization signal is determined based on the difference between a level transition timing of the adjusted synchronization signal and the controlled transmission timing.

16. The method of claim 13 , wherein the portable device is one of a cellular phone, a smart phone and a tablet personal computer.

17. A method for processing display data of a portable device comprising:
detecting a mode change command in a CPU and transmitting a control signal corresponding to the detection result to a display driver;
receiving a synchronization signal output from the display driver; and related to transmission of display data;
adjusting, based on information for adjusting the synchronization signal, at least one of a delay or a pulse width of the synchronization signal and generating the adjusted synchronization signal;
adjusting the transmission timing of the display data in response to the adjusted synchronization signal and transmitting the transmission timing-controlled display data to the display driver; and
processing the transmission timing-controlled display data and displaying processed display data on a display,
wherein the synchronization signal is generated based on the control signal.

18. The method of claim 17 , wherein generating the adjusted synchronization signal adjusts at least one of the delay and the pulse width by using information for adjusting the synchronization signal output from a display controller, to adjust the transmission timing, and to generate the adjusted synchronization signal.

19. A display controller comprising:
an adjusting circuit configured to receive a synchronization signal output from a display driver, wherein the synchronization signal is a signal related to the transmission of d

Assignees

• Kim Kyoung Man
• Roh Jong Ho
• Samsung Electronics Co Ltd

Inventors

• Kim Kyoung Man
• Roh Jong Ho

Classifications

• G09G2370/08

  Details of image data interface between the display device controller and the data line driver circuit · CPC title

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G2320/0247

  Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes · CPC title

• G09G3/2092 Primary

  Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165) · CPC title