Display driving circuit and display device including the same

Patent metadata

Field	Value
Publication number	US-10068555-B2
Application number	US-201615158804-A
Country	US
Kind code	B2
Filing date	May 19, 2016
Priority date	May 19, 2015
Publication date	Sep 4, 2018
Grant date	Sep 4, 2018

Abstract

An display driving circuit including a buffer write controller transmitting a different image frame to a first buffer or a second buffer, a buffer scan controller scanning an image frame stored in the first buffer or the second buffer on the basis of a predetermined cycle, a write signal detector controlling the buffer write controller such that a second image frame is transmitted to the second buffer after a first image frame is transmitted to the first buffer, and a scan buffer switching controller receiving an EOF (End of Frame) command indicating the completion of transmission of the first image frame to the first buffer and controlling the buffer scan controller such that the first image frame stored in the first buffer is scanned after the image frame previously stored in the second buffer is scanned.

First claim

What is claimed is:

1. A display driving circuit, comprising:
a buffer write controller configured to transmit a first image frame to a first buffer and a second image frame to a second buffer based on a first control command, the first image frame and the second image frame being sequential image frames received from a host;
a buffer scan controller configured to scan different ones of the first image frame stored in the first buffer and the second image frame stored in the second buffer based on a cycle and a second control command;
a timing controller configured to,
generate an End Of Scan (EOS) command indicating that the buffer scan controller has completed scanning of the first image frame, and
transmit a first periodic signal to the host only when an End of Frame (EOF) command is received and the EOS command is generated, the EOF command indicating that transmission of the first image frame to the first buffer is complete, and the first periodic signal being a signal instructing the host to transmit a next one of the sequential image frames;

a write signal detector configured to generate the first control command to control the buffer write controller such that the second image frame is transmitted to the second buffer only after the first image frame is transmitted to the first buffer; and
a scan buffer switching controller configured to,
receive the EOF command, and
generate the second control command to control the buffer scan controller based on the EOF command and the EOS command such that the first image frame is scanned only after the EOF command indicates that transmission of the first image frame from the host to the first buffer is complete, and the EOS command indicates that a prior second image frame stored in the second buffer is scanned.

2. The display driving circuit according to claim 1 , wherein the write signal detector is configured to,
receive the EOF command, after the buffer write controller transmits the first image frame or the second image frame, and
determine whether the buffer write controller transmits an image frame to the first buffer or the second buffer based on the EOF command.

3. The display driving circuit according to claim 1 , wherein the write signal detector is configured to,
generate the EOF command each time the buffer write controller transmits the first image frame or the second image frame, and
transmit the EOF command to the scan buffer switching controller.

4. A display driving circuit configured to process image frames including a first image frame and a second image frame, comprising:
a first buffer and a second buffer configured to store ones of the image frames;
a buffer write controller configured to,
receive the image frames successively, and
alternately transmit the first image frame to the first buffer and the second image frame to the second buffer such that, when the second image frame includes updated information associated with only a partial area of the first image frame, the buffer write controller is configured to transmit an entirety of the first image frame to the first buffer in a first cycle, transmit the entirety of the first image frame to the second buffer again in a second cycle such that the first buffer and the second buffer store identical ones of the image frames in the second cycle, and then transmit only the updated information associated with the partial area to the first buffer in a third cycle, the first cycle the second cycle and the third cycle being subsequent cycles of a periodic signal generated each time an end of frame (EOF) command is received, the EOF command indicating that transmission of one of the image frames to a corresponding one of the first buffer and the second buffer is complete, and

a buffer scan controller alternately scanning the image frames stored in the first buffer or the second buffer.

5. A display driving circuit configured to process image frames including a first image frame and a second image frame, the circuit comprising:
a driving controller configured to,
alternately transmit the first image frame received from a host to a first buffer and the second image frame received from the host to a second buffer based on an End Of Frame (EOF) command, the first image frame being a different image from the second image frame and the EOF command indicating that the host has completed transmission of a respective one of the image frames,
generate an End of Scan (EOS) command, if the driving controller completes scanning one of the first buffer and the second buffer, the EOS command indicating that the driving controller has completed scanning the one of the first buffer and the second buffer and transmitted a respective one of the first image frame and the second image frame to a display panel,
transmit a first periodic signal to the host only when the EOF command is received and the EOS command is generated, and the first periodic signal instructing the host to transmit a next one of the image frames, and
alternately scan the first buffer and the second buffer based on at least on the EOF command and the EOS command such that the second buffer is scanned only after the EOF command indicates that transmission of the second image frame from the host to the second buffer is complete and the EOS command indicates that the first buffer is scanned.

6. The display driving circuit of claim 5 , wherein the driving controller is further configured to generate a second periodic signal.

7. The display driving circuit of claim 5 , wherein the driving controller is configured to re-scan a first one of the first buffer and the second buffer until confirmation that a second one of the first buffer and the second buffer has been updated.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Yang-Hyo
• Kim Chul-Ho
• Kim Sun-Young
• Kim Hak-Song
• Lim Sang-Hoon

Classifications

• G09G2330/021

  Power management, e.g. power saving · CPC title

• G09G5/006

  Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04) · CPC title

• G09G5/12

  Synchronisation between the display unit and other units, e.g. other display units, video-disc players · CPC title

• G09G5/003

  Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto (specific for a CRT G09G1/165; for a flat panel G09G3/2092) · CPC title

• G09G5/399 Primary

  using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers · CPC title