Thermal management solution for power stage comprising top-cooled power semiconductor switching devices

US12336148B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12336148-B2
Application numberUS-202318120046-A
CountryUS
Kind codeB2
Filing dateMar 10, 2023
Priority dateMar 10, 2023
Publication dateJun 17, 2025
Grant dateJun 17, 2025

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A power stage assembly for improved thermal dissipation and EMC for top-cooled semiconductor power switching devices, e.g. high voltage, high current lateral GaN power transistors in embedded die packages. The power switching devices are mounted on a PCB substrate, with electrical connections between a bottom side of each device package and the PCB. Each device package has a thermal pad on the top-side. A heat-spreader is secured in thermal contact with the thermal pads of each device, and a heatsink is in thermal contact with the heat-spreader. The heat-spreader is a multilayer structure comprising: a thermally conductive metal substrate layer in contact with the heatsink; a conductive layer providing an EMC layer which is connected to power ground; a conductive layer defining large area thermal pads in thermal contact with thermal pads of each die; and dielectric material electrically isolating conductive layers of the heat-spreader.

First claim

Opening claim text (preview).

The invention claimed is: 1. A power stage assembly for top-cooled semiconductor power switching devices comprising: a PCB substrate a plurality of embedded die packages, each die package comprising a semiconductor power switching device comprising at least one power transistor, having electrical contact areas on a front-side of the embedded die package and a thermal pad on the back side of the embedded die package; the plurality of embedded die packages being mounted on the PCB substrate with electrical connections between conductive traces of the PCB and the electrical contact areas on the front-side of each die package; a heat-spreader in thermal contact with the thermal pads on the back-side of each die package; the heat-spreader being secured to the PCB substrate; and a heatsink in thermal contact with the heat-spreader; wherein the heat-spreader is a multilayer structure comprising: a first layer comprising a thermally conductive metal substrate layer in contact with the heatsink; a second layer comprising a thermally conductive dielectric layer; a third layer comprising an electrically conductive and thermally conductive material defining an electromagnetic compatibility (EMC) shielding layer; a fourth layer comprising a thermally conductive dielectric layer; a fifth layer comprising an electrically conductive and thermally conductive material defining thermal pads in thermal contact with thermal pads of each die package; the dielectric layers providing electrical isolation between said conductive layers; and the EMC shielding layer being interconnected to power ground; and the thermal pads of the fifth layer having an area larger than an area of the thermal pad of each embedded die package to provide lateral heat-spreading. 2. The power stage assembly of claim 1 , wherein said layers of the heat-spreader are provided by a multi-layer insulated metal substrate (IMS). 3. The power stage assembly of claim 1 , wherein the top-cooled power switching devices are GaN power switching devices. 4. The power stage assembly of claim 1 , configured for a half-bridge switch topology, a full-bridge switch topology, or other switch topology comprising a plurality of power switching devices. 5. The power stage assembly of claim 1 , wherein the thermal pads of the embedded die packages have an area A D and the thermal pads of the heat-spreader have an area A H , and wherein an area ratio of A H :A D is in a range of 3:1 to 10:1. 6. The power stage assembly of claim 1 , wherein the thermal pads of the embedded die packages have an area A D and the thermal pads of the heat-spreader have an area A H , and wherein an area ratio of A H :A D is greater than 5:1. 7. The power stage assembly of claim 1 , configured for a half-bridge switch topology, wherein: the embedded die packages are arranged to provide a high-side switch comprising one power switching device or a plurality of power switching devices electrically connected in parallel and a low-side switch comprising one power switching device or a plurality of power switching devices electrically connected in parallel, and said thermal pads of the fifth layer of the heat-spreader comprise a first thermal pad for the low-side switch and a second thermal pad for the high-side switch, and wherein the first thermal pad is interconnected through the fourth layer to the EMC shielding layer. 8. The power stage assembly of claim 1 , configured for a full-bridge switch topology, wherein: the embedded die packages are arranged to provide a high-side switch comprising one power switching device or a plurality of power switching devices electrically connected in parallel and a low-side switch comprising one power switching device or a plurality of power switching devices electrically connected in parallel, and said thermal pads of the fifth layer of the heat-spreader comprise a first thermal pads for each for the low-side switch and second thermal pads for each of the high-side switch, and wherein the first thermal pads are interconnected through the fourth layer to the EMC shielding layer. 9. The power stage assembly of claim 1 , configured for a full-bridge switch topology, wherein: the embedded die packages are arranged to provide a high-side switch comprising one power switching device or a plurality of power switching devices electrically connected in parallel and a low-side switch comprising one power switching device or a plurality of power switching devices electrically connected in parallel, and said thermal pads of the fifth layer of the heat-spreader comprise a first thermal pad for the low-side switch and second thermal pad for the high-side switch. 10. A heat-spreader for a power stage assembly configured for a half-bridge switch module, wherein a plurality of embedded die packages are arranged to provide a high-side switch comprising one power switching device or a plurality of power switching devices electrically connected in parallel and a low-side switch comprising one power switching device or a plurality of power switching devices electrically connected in parallel, the heat-spreader comprising a multilayer insulated metal substrate (IMS) structure comprising: a first layer comprising a thermally conductive metal substrate layer; a second layer comprising a thermally conductive dielectric layer; a third layer comprising an electrically conductive and thermally conductive material defining an electromagnetic compatibility (EMC) shielding layer; a fourth layer comprising a thermally conductive dielectric layer; a fifth layer comprising an electrically conductive and thermally conductive material defining thermal pads in thermal contact with thermal pads of each die package; the dielectric layers providing electrical isolation between said conductive layers; and the EMC shielding layer being interconnected to power ground; the thermal pads of the fifth layer having an area larger than an area of the thermal pad of each embedded die package to provide lateral heat-spreading; said thermal pads of the fifth layer of the heat-spreader comprising a first thermal pad for the low-side switch and a second thermal pad for the high-side switch, and wherein the first thermal pad is interconnected through the fourth layer to the EMC shielding layer. 11. A power stage assembly for top-cooled semiconductor power switching devices comprising: a PCB substrate a plurality of embedded die packages, each embedded die package comprising a semiconductor power switching device comprising at least one power transistor, having electrical contact areas on a bottom-side of the die package and a thermal pad on a top-side of the die package; the plurality of embedded die packages being mounted on the PCB substrate with electrical connections between conductive traces of the PCB substrate and the electrical contact areas on the back-side of each die package; a heat-spreader in thermal contact with the thermal pads on the back-sides of each of each die package; the heat-spreader being secured to the PCB substrate; and a heatsink in thermal contact with the heat-spreader; wherein the heat-spreader is a multilayer structure comprising: a first layer comprising a thermally conductive metal substrate layer in contact with the heatsink; a second layer comprising a thermally conductive dielectric layer; a third layer comprising an electrically conductive and thermally conductive material defining thermal pads in contact with thermal pads of each die package; the dielectric layer providing electrical isolation between the first and second layers of the heat-spreader; the thermal pads of the third layer having an area larger than an area of the ther

Assignees

Inventors

Classifications

  • characterised by projecting parts, e.g. fins to increase surface area (leadframes for cooling H10W70/461) · CPC title

  • Reduction of cross-talk, noise or electromagnetic interference (grounding H05K1/0215) · CPC title

  • Heatsink mounted on the surface of the printed circuit board [PCB] · CPC title

  • Transistor · CPC title

  • H05K1/185Primary

    associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards · CPC title

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What does patent US12336148B2 cover?
A power stage assembly for improved thermal dissipation and EMC for top-cooled semiconductor power switching devices, e.g. high voltage, high current lateral GaN power transistors in embedded die packages. The power switching devices are mounted on a PCB substrate, with electrical connections between a bottom side of each device package and the PCB. Each device package has a thermal pad on the …
Who is the assignee on this patent?
Gan Systems Inc
What technology area does this patent fall under?
Primary CPC classification H05K1/185. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 17 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).