Semiconductor inspection tool system and method for wafer edge inspection

US12320757B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-12320757-B2
Application numberUS-202318216162-A
CountryUS
Kind codeB2
Filing dateJun 29, 2023
Priority dateJun 30, 2022
Publication dateJun 3, 2025
Grant dateJun 3, 2025

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor inspection tool system is disclosed. The system comprises a first illumination setup for generating at least one first illumination radiation and for directing the at least one first illumination radiation to at least one bonding region non-filled volume formed between two layers of a multi-layer stack. The system also comprises a second illumination setup being for generating at least one second illumination radiation and for directing the at least one second illumination radiation at multi-layer stack edges. The second illumination radiation is configured for illuminating at least a normal edge of at least two layers, the second illumination setup has different radiation parameters than the first illumination setup. The system further includes a bonding region sensor unit for collecting reflected electromagnetic radiation from a bonding region volume and generating at least one sensing data being indicative of the bonding region.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor inspection tool system comprising: a first illumination setup being configured and operable to generate at least one first illumination radiation and to direct the at least one first illumination radiation to at least one bonding region non-filled volume being formed between two layers of a multi-layer stack; a second illumination setup being configured and operable to generate at least one second illumination radiation and to direct the at least one second illumination radiation at multi-layer stack edges, the at least one second illumination radiation being configured for illuminating at least a normal edge of at least one layer, wherein the second illumination setup has different radiation parameters than the first illumination setup; and a bonding region sensor unit being configured and operable for collecting reflected electromagnetic radiation from a bonding region volume during more than one rotation of the multi-layer stack and generating at least one sensing data being indicative of the bonding region. 2. The semiconductor inspection tool system of claim 1 , further comprises a processing unit being connectable to said bonding region sensor unit; wherein said processing unit is configured and operable to receive data indicative of the reflected electromagnetic radiation being collected during more than one rotation of the multi-layer stack. 3. The semiconductor inspection tool system of claim 2 , wherein the processing unit is configured and operable to receive an output data being indicative of said more than one rotations and generate an image being indicative of at least one apex surface of a layer within the multi-layer stack including at least one bevel of a layer within the multi-layer stack. 4. The semiconductor inspection tool system of claim 3 , wherein the processing unit is configured and operable to receive an output data being indicative of at least two rotations of the multi-layer stack being at different focus positions and generate an all-in-focus image being indicative of at least one section of the apex surface of the multi-layer stack. 5. The semiconductor inspection tool system of claim 2 , wherein said processing unit comprises a control unit being configured and operable to control the positioning and the operation of at least one of (i) at least some elements of the at least first or second illumination setups, (ii) the bonding region sensor unit including at least one of the bonding region sensor or optical elements directing reflected radiation towards the bonding region sensor if any, or (iii) the multi-layer stack and the bonding region. 6. The semiconductor inspection tool system of claim 5 , wherein the control unit is configured and operable to vary an exposure rate of the bonding region sensor unit and other exposure related parameters of the bonding region sensor unit or of the elements of the at least first or second illumination setups. 7. The semiconductor inspection tool system of claim 5 , wherein the control unit is configured and operable to vary an exposure rate of the bonding region sensor unit and other exposure related parameters of the bonding region sensor unit and/or of the elements of the at least first or second illumination setups during the same or different rotations of said more than one rotations. 8. The semiconductor inspection tool system of claim 1 , wherein said bonding region sensor unit comprises at least one of (i) an apex sensor being configured and operable to collect radiation reflected from at least one region including an apex region of a layer of a multi-layer stack, the reflected radiation being directed at a normal direction with the edge of the multi-layer stack of a wafer or (ii) a side sensor being configured and operable to collect reflected electromagnetic radiation from the bonding region being directed at a non-normal direction with the edge of the multi-layer stack of a wafer. 9. The semiconductor inspection tool system of claim 8 , wherein the apex region defines at least one of the following regions: an apex surface in the bonding region non-filled volume, an apex surface in the non-bonded region, an apex surface on the distal edge of the bonding layer, a top bevel or a bottom bevel. 10. The semiconductor inspection tool system of claim 8 , wherein the apex sensor is capable of being positioned facing a center of the multi-layer stack, such that the focal plane of the apex sensor is placed at one of the following positions: at the distal end of the bonding region volume, or at the distal end of the bonding region non-filled volume within the field of view of the apex sensor. 11. The semiconductor inspection tool system of claim 10 , wherein the apex sensor is capable of being positioned such that the center of the field of view of the apex sensor is directed at the distal end of the bonding region volume. 12. The semiconductor inspection tool system of claim 8 , wherein the apex sensor is configured and operable to collect radiation reflected from a top or bottom flat region. 13. The semiconductor inspection tool system of claim 8 , wherein said side sensor is configured and operable to be positioned at an angle in the range up to about +/−80 deg with the normal direction. 14. The semiconductor inspection tool system of claim 1 , further comprising an optical element being placed at the edge of the multi-layer stack and being configured and operable to deviate the path of the reflected electromagnetic radiation and direct the reflected electromagnetic radiation to reach said bonding region sensor unit. 15. The semiconductor inspection tool system of claim 14 , wherein said optical element includes at least one of an optical lens, a beam splitter, a mirror, a prism, a reflective surface, light pipe or a fiber optic cable. 16. The semiconductor inspection tool system of claim 14 , wherein said first illumination setup is oriented opposite to the bonding region sensor's optical axis with respect to the normal direction of the edge of the multi-layer stack of a wafer to enable concurrent illumination and collection of reflected electromagnetic radiation. 17. The semiconductor inspection tool system of claim 1 , wherein said first illumination setup is configured and operable to generate at least one first illumination radiation having a main direction defining a non-zero angle with a bonding region center plane. 18. The semiconductor inspection tool system of claim 1 , wherein at least one of said first illumination setup and said second illumination setup is arranged along an illumination arc. 19. The semiconductor inspection tool system of claim 1 , wherein at least one of said first illumination setup and said second illumination setup comprises at least one guiding element connected to a light source; each of said at least one guiding element being configured and operable to direct the first or the second light radiation towards a certain bonding region of the multi-layer stack. 20. The semiconductor inspection tool system of claim 1 , wherein at least one of said first illumination setup and said second illumination setup is configured and operable to generate a collimated light beam. 21. The semiconductor inspection tool system of claim 20 , wherein each of at least one of said first illumination setup and said second illumination setup comprises at least one of a light source emitting at least one collimated light beam or a non-collimated light source being optically coupled to any c

Assignees

Inventors

Classifications

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Apparatus for mechanical treatment or grinding or cutting · CPC title

  • Process monitoring, e.g. flow or thickness monitoring · CPC title

  • Illumination and detection on two sides of object · CPC title

  • Separate detection of dark field and bright field · CPC title

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What does patent US12320757B2 cover?
A semiconductor inspection tool system is disclosed. The system comprises a first illumination setup for generating at least one first illumination radiation and for directing the at least one first illumination radiation to at least one bonding region non-filled volume formed between two layers of a multi-layer stack. The system also comprises a second illumination setup being for generating a…
Who is the assignee on this patent?
Camtek Ltd
What technology area does this patent fall under?
Primary CPC classification H10P72/0604. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 03 2025 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).