Semiconductor inspection tool system and method for wafer edge inspection

US11828713B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-11828713-B1
Application numberUS-202218080006-A
CountryUS
Kind codeB1
Filing dateDec 13, 2022
Priority dateJun 30, 2022
Publication dateNov 28, 2023
Grant dateNov 28, 2023

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor inspection tool system is disclosed. The system comprises a first illumination setup for generating at least one first illumination radiation and for directing the at least one first illumination radiation to at least one bonding region non-filled volume formed between two layers of a multi-layer stack. The system also comprises a second illumination setup being for generating at least one second illumination radiation and for directing the at least one second illumination radiation at multi-layer stack edges. The second illumination radiation is configured for illuminating at least a normal edge of at least two layers, the second illumination setup has different radiation parameters than the first illumination setup. The system further includes a bonding region sensor unit for collecting reflected electromagnetic radiation from a bonding region volume and generating at least one sensing data being indicative of the bonding region.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor inspection tool system comprising: a first illumination setup being configured and operable to generate at least one first illumination radiation and to direct the at least one first illumination radiation to at least one bonding region non-filled volume being formed between two layers of a multi-layer stack; a second illumination setup being configured and operable to generate at least one second illumination radiation and to direct the at least one second illumination radiation at multi-layer stack edges, the at least one second illumination radiation being configured for illuminating at least a normal edge of at least two layers, wherein the second illumination setup has different radiation parameters than the first illumination setup; and a bonding region sensor unit comprising imaging or non-imaging detectors being configured and operable for collecting reflected electromagnetic radiation from a bonding region volume and generating at least one sensing data being indicative of the bonding region. 2. The semiconductor inspection tool system of claim 1 , wherein the second illumination radiation comprises omnidirectional or isotropic light and is further configured and operable for illuminating at least one of a top bevel or a bottom bevel of at least one layer. 3. The semiconductor inspection tool system of claim 1 , further comprising at least one of an edge top sensor for obtaining sensing data of a top surface of a layer proximal to an outer edge of the layer or an edge bottom sensor for obtaining sensing data of a bottom surface of a layer proximal to an outer edge of the layer. 4. The semiconductor inspection tool system of claim 3 , further comprising a processing unit comprising a general-purpose computer processor being configured and operable for receiving and analyzing sensing data from at least one of the following sensors: the bonding region sensor unit, the edge top sensor or the edge bottom sensor. 5. The semiconductor inspection tool system of claim 4 , wherein said processing unit is further configured and operable to analyze the sensing data and determine at least one of layer data, layer anomalies or defect data. 6. The semiconductor inspection tool system of claim 1 , wherein the first illumination radiation is directed towards a bonding region at a direction substantially parallel to bonding region center plane. 7. The semiconductor inspection tool system of claim 6 , wherein at least one of the first or the second illumination setups is configured and operable to generate a fluorescence emission of the bonding layer. 8. The semiconductor inspection tool system of claim 7 , wherein the bonding region sensor unit is configured and operable for collecting fluorescent emission. 9. The semiconductor inspection tool system of claim 1 , wherein the first illumination setup is a part of the second illumination setup. 10. The semiconductor inspection tool system of claim 1 , wherein the second illumination radiation parameters comprise at least one of, focusing, beam size, power, polarization, or direction. 11. The semiconductor inspection tool system of claim 1 , wherein the second illumination radiation parameters comprise beam propagation parameters comprising at least one of, collimation, convergence or divergence. 12. The semiconductor inspection tool system of claim 11 , the first illumination beam parameters are configured to generate an illumination beam having a diameter being in the same order of magnitude larger than a bonding region thickness. 13. The semiconductor inspection tool system of claim 1 , wherein said first and second illumination setups comprises a same type of illumination setup. 14. The semiconductor inspection tool system of claim 13 , wherein said first and second illumination setups comprises at least one of (i) at least one bright field illumination setup or (i) at least one dark field illumination setup. 15. The semiconductor inspection tool system of claim 1 , wherein at least one of said first or second illumination setups further comprises optical elements for at least one of directing or affecting the illumination radiations.

Assignees

Inventors

Classifications

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Apparatus for mechanical treatment or grinding or cutting · CPC title

  • Process monitoring, e.g. flow or thickness monitoring · CPC title

  • Wafer edge inspection · CPC title

  • Specially adapted optical and illumination features · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US11828713B1 cover?
A semiconductor inspection tool system is disclosed. The system comprises a first illumination setup for generating at least one first illumination radiation and for directing the at least one first illumination radiation to at least one bonding region non-filled volume formed between two layers of a multi-layer stack. The system also comprises a second illumination setup being for generating a…
Who is the assignee on this patent?
Camtek Ltd
What technology area does this patent fall under?
Primary CPC classification H10P72/0604. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 28 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).