Measuring device and method for measuring layer thicknesses and defects in a wafer stack

US10008424B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10008424-B2
Application numberUS-201615053237-A
CountryUS
Kind codeB2
Filing dateFeb 25, 2016
Priority dateNov 12, 2010
Publication dateJun 26, 2018
Grant dateJun 26, 2018

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A method for measuring and/or acquiring layer thicknesses and voids of one or more layers of a temporary bonded wafer stack on a plurality of measuring points is provided. A sequence of the method includes an arrangement of a measurement means for measuring and/or acquiring the layer thicknesses and voids of the layers of the wafer stack at the measuring points relative to a flat side of the wafer stack. The sequence further includes an emission of signals in the form of electromagnetic waves by a transmitter of the measurement means, and a receiving the signals which have been reflected by the wafer stack by a receiver of the measurement means. The sequence also includes an evaluation of the signals which have been received by the receiver by an evaluation unit.

First claim

Opening claim text (preview).

Having described the invention, the following is claimed: 1. A method for processing a temporarily bonded wafer stack, said method comprising the following steps: temporarily bonding one or more layers to form the temporarily bonded wafer stack, the layers comprising a structure wafer, a connecting layer of temporary adhesive, and a carrier wafer, the temporarily bonding step comprising a step of temporarily bonding the structure wafer to the carrier wafer via the temporary adhesive connecting layer, accommodating and fixing the temporarily bonded wafer stack to move the temporarily bonded wafer stack parallel to a reference plane (R), measuring respective thicknesses of the layers and/or detecting voids of the layers on a plurality of measuring points distributed on the temporarily bonded wafer stack, the measuring and/or detecting step comprising the steps of: first moving a transmitter relative to the temporarily bonded wafer stack, emitting signals in the form of electromagnetic waves or ultrasonic waves from the transmitter into the temporarily bonded wafer stack, second moving a receiver relative to the temporarily bonded wafer stack, the receiver being moved with the transmitter, receiving, with the receiver, signals that were emitted by the transmitter and reflected by the temporarily bonded wafer stack, and evaluating the received signals, the step of evaluating comprising: distinguishing a group of the received signals by at least two transitions between the layers of the temporarily bonded wafer stack, determining a distance of each of the received signals to one another and/or a reference plane (R), detecting a movement of the temporarily bonded wafer stack and/or the transmitter and receiver parallel to the reference plane (R), and detecting a position of each of the measuring points along the reference plane (R), grinding at least a portion of the temporarily bonded wafer stack after the step of evaluating the received signals, and detaching the temporarily bonded structure wafer from the carrier wafer. 2. The method according to claim 1 , wherein the grinding occurs spatially separate from the measuring, as far as no deviation of quality criteria is determined. 3. The method according to claim 1 , wherein the wafer stack is reworked in case of deviations of quality criteria. 4. The method according to claim 1 , wherein the portion of the temporarily bonded wafer stack is the structure wafer. 5. The method according to claim 1 , wherein the detaching comprises dissolving an edge zone of the temporary adhesive connecting layer by applying chemicals to the edge zone. 6. The method according to claim 1 , wherein the measuring and/or detecting comprises measuring the thickness of the temporary adhesive connecting layer and/or detecting the voids in the temporary adhesive connecting layer. 7. The method according to claim 6 , wherein the measured thickness of the temporary adhesive connecting layer is in a range between 37 μm and 42 μm. 8. A method for processing a temporarily bonded wafer stack, said method comprising the following steps: temporarily bonding one or more layers to form the temporarily bonded wafer stack, the layers comprising a structure wafer, a connecting layer of temporary adhesive, and a carrier wafer, the temporarily bonding step comprising the step of temporarily bonding the structure wafer to the carrier wafer via the temporary adhesive layer; arranging a measurement means relative to a flat side of the temporarily bonded wafer stack, the measurement means being configured to measure layer thicknesses and/or detect voids of the layers of the wafer stack at a plurality of measuring points distributed on the temporarily bonded wafer stack; emitting electromagnetic or ultrasonic wave signals into the temporarily bonded wafer stack with a transmitter of the measurement means; receiving reflected electromagnetic or ultrasonic wave signals from the temporarily bonded wafer stack with a receiver of the measurement meant, the reflected electromagnetic or ultrasonic wave signals being generated by reflection of the injected electromagnetic or ultrasonic wave signals by the temporarily bonded wafer stack; and evaluating the received reflected electromagnetic or ultrasonic wave signals received by the receiver by an evaluation unit, the evaluating comprising: distinguishing a group of the received reflected electromagnetic or ultrasonic wave signals by at least two transitions between the layers of the temporarily bonded wafer stack; determining a distance of each of the received reflected electromagnetic or ultrasonic wave signals to one another and/or a reference plane (R); detecting a movement of the temporarily bonded wafer stack and/or the measurement means parallel to the reference plane (R), and detecting a position of each of the measuring points along the reference plane (R); and detaching the temporarily bonded structure wafer from the carrier wafer. 9. The method according to claim 8 , further comprising: grinding at least a portion of the temporarily bonded wafer stack after the step of evaluating received reflected electromagnetic or ultrasonic wave signals.

Assignees

Inventors

Classifications

  • Monitoring of warpages, curvatures, damages, defects or the like · CPC title

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • Process monitoring, e.g. flow or thickness monitoring · CPC title

  • H10P74/23Primary

    characterised by multiple measurements, corrections, marking or sorting processes · CPC title

  • by moving both the sensor and the material · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US10008424B2 cover?
A method for measuring and/or acquiring layer thicknesses and voids of one or more layers of a temporary bonded wafer stack on a plurality of measuring points is provided. A sequence of the method includes an arrangement of a measurement means for measuring and/or acquiring the layer thicknesses and voids of the layers of the wafer stack at the measuring points relative to a flat side of the wa…
Who is the assignee on this patent?
Ev Group E Thallner Gmbh
What technology area does this patent fall under?
Primary CPC classification H10P74/23. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 26 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).