Vertical output couplers for photonic devices
US-9829631-B2 · Nov 28, 2017 · US
US12292597B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-12292597-B2 |
| Application number | US-202217949096-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 20, 2022 |
| Priority date | Sep 23, 2021 |
| Publication date | May 6, 2025 |
| Grant date | May 6, 2025 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Configurations for an optical system used for guiding light and reducing back-reflection back in an output waveguide is disclosed. The optical system may include an output waveguide defined in a slab waveguide. The output waveguide may terminate before an output side of the slab waveguide, which may reduce the back-reflection of light from the output side back into the output waveguide. The output side may define an optical element that may steer the output light. The optical element may collimate the output light, cause the output light to converge, or cause the output light to diverge.
Opening claim text (preview).
What is claimed is: 1. A photonic integrated circuit, comprising: a substrate; a cladding layer; and a waveguide layer comprising: a slab waveguide; and a waveguide comprising: a first light confining region; a second light confining region; and a waveguide core positioned between the first light confining region and the second light confining region; wherein: the waveguide terminates into the slab waveguide at a junction between the waveguide and the slab waveguide; and the waveguide comprises an index adjustment region positioned at the junction in which widths of one or both of the first light confining region and the second light confining region decrease in a direction toward the junction. 2. The photonic integrated circuit of claim 1 , wherein the waveguide layer comprises: an optical splitter comprising: the slab waveguide; the waveguide; and a plurality of output waveguides, wherein: the optical splitter is configured such that input light introduced into the slab waveguide from the waveguide is split between the plurality of output waveguides. 3. The photonic integrated circuit of claim 2 , wherein: the waveguide layer comprises a side surface that defines an optical element; and the waveguide is positioned such that the input light introduced from the waveguide into the slab waveguide exits the photonic integrated circuit through the side surface. 4. The photonic integrated circuit of claim 3 , wherein: the optical element forms an on-chip lens. 5. The photonic integrated circuit of claim 3 , wherein: the optical element comprises a diffraction grating. 6. The photonic integrated circuit of claim 1 , wherein: a width of the waveguide core is constant in the index adjustment region. 7. The photonic integrated circuit of claim 1 , wherein: a width of the waveguide core narrows adiabatically in the index adjustment region in a direction toward the junction. 8. The photonic integrated circuit of claim 1 , wherein: a width of the waveguide core increases non-adiabatically in the index adjustment region in a direction toward the junction. 9. The photonic integrated circuit of the claim 1 , wherein: widths of one or both of the first light confining region and the second light confining region decrease linearly in a direction toward the junction. 10. A photonic integrated circuit, comprising: a substrate; a cladding layer; and a waveguide layer comprising: a slab waveguide; and a waveguide comprising: a first light confining region; a second light confining region; and a waveguide core positioned between the first light confining region and the second light confining region; wherein: the waveguide terminates into the slab waveguide at a junction between the waveguide and the slab waveguide; and the waveguide comprises an index adjustment region positioned at the junction in which a width of the waveguide core increases in a direction toward the junction. 11. The photonic integrated circuit of claim 10 , wherein the waveguide layer comprises: an optical splitter comprising: the slab waveguide; the waveguide; and a plurality of output waveguides, wherein: the optical splitter is configured such that input light introduced into the slab waveguide from the waveguide is split between the plurality of output waveguides. 12. The photonic integrated circuit of claim 10 , wherein: the waveguide layer comprises a side surface that defines an optical element; and the waveguide is positioned such that input light introduced from the waveguide into the slab waveguide exits the photonic integrated circuit through the side surface. 13. The photonic integrated circuit of claim 12 , wherein: the optical element forms an on-chip lens. 14. The photonic integrated circuit of claim 10 , wherein: the width of the waveguide core increases non-adiabatically in the index adjustment region. 15. The photonic integrated of circuit of claim 10 , wherein: widths of the first light confining region and the second light confining regions are constant in the index adjustment region. 16. The photonic integrated circuit of claim 10 , wherein: the waveguide comprises an additional region in which the width of the waveguide core narrows adiabatically in a direction toward the junction; and the index adjustment region is positioned between the additional region and the junction. 17. The photonic integrated circuit of claim 10 , wherein the width of the waveguide core increases linearly in the index adjustment region. 18. An optical system comprising: a light source unit configured to generate a set of wavelengths within a target wavelength range; and a photonic integrated circuit: comprising: a substrate; a cladding layer; and a waveguide layer comprising: a slab waveguide; and a waveguide comprising: a first light confining region; a second light confining region; and a waveguide core positioned between the first light confining region and the second light confining region; wherein: the waveguide terminates into the slab waveguide at a junction between the waveguide and the slab waveguide; and the waveguide comprises an index adjustment region positioned in which widths of each the first light confining region and the second light confining region narrow from a first width to a second width in a direction toward the junction. 19. The optical system of claim 18 , wherein: a portion of each of the first light confining region and the second light confining region having the second width has a length; and the length is one quarter of a wavelength within the target wavelength range. 20. The optical system of claim 18 , wherein: a width of the waveguide core increases from a third width to a fourth width in the index adjustment region.
Geodesic lenses or integrated gratings · CPC title
Grating · CPC title
Lens · CPC title
Splitter · CPC title
having lens focusing means {positioned between opposed fibre ends (with lens being an integral part of the single fibre end G02B6/262)} · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.